From patchwork Wed May 24 08:20:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 766377 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wXllY5Cpzz9s8H for ; Wed, 24 May 2017 18:23:21 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="TV+4TSf+"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762477AbdEXIWj (ORCPT ); Wed, 24 May 2017 04:22:39 -0400 Received: from mail-wm0-f43.google.com ([74.125.82.43]:36445 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936719AbdEXIUy (ORCPT ); Wed, 24 May 2017 04:20:54 -0400 Received: by mail-wm0-f43.google.com with SMTP id 7so54377976wmo.1 for ; Wed, 24 May 2017 01:20:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bkrsIOgLIV9Rh/st5ayHoLUy63ZeXRF6kO37Ssenl4w=; b=TV+4TSf+1PHORYes42SSVB5D6gMWM9zo1qUYdtwLbL/mpahf0zKsK39oCzax3fRzDL X2uwsQkgJJl61D6PxV7NOZHE4CoCzDXi7V3NBsDcHyKmrLwSOPbJEJgIPXzaMLSa+PLn a1+H9BKV4qLCnollnq+mDPTO+AYZRkV2pCAKb0jikF/rtSWzCjILmX8ZltP60MhNKGUO DDS0WiBh+htJg3d58u80lxdm1Ahzu+D7ScuztoG3IQP4uJWfnfyYXZKj4QR0iO3gHuNQ A58YgDc0XdaH3dZREV0Rt8PdYRkG0wZJJnTd+loFHGq+7xe0tgHnu34WIZKrqYOT5Ss/ MYwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bkrsIOgLIV9Rh/st5ayHoLUy63ZeXRF6kO37Ssenl4w=; b=rB51zOeDnRrFGLx1eIH0wErG5s1c3+qi2JZOsPqEfsNWMqWKpnCCtMqqTSFbwV2VkA XnihntSFNKfUO+2anwmAz7a/4gbs+YsZDYxSMD2eTa9Q61NjHHaCAJp7bNMh5kfgy+W8 gJakvyVS69wW5wlx7/ln+tbiabb74PaO7QtRf9u7GIl5cQi80T/kR52D4aqiAArEPhGP oe2lBOx1703ZWfaREi+0fMIuLxtAPWRKu8XDkEmtzq/EukKPrfkzjEaZ18n5VMUaYvUO SIc8qShXLjJCOqo2Uo8sEH27dyNKd4MGyoRt7ywVyBZTHye2Gi//9QhOQbIFl9yEKRZN f9cg== X-Gm-Message-State: AODbwcAQK6qd1sPBkHZ8z4k3Son547iaq//2JCgCvm4xucEJ6fktTuS9 iEUeDHv/6RK3GvT2 X-Received: by 10.28.20.14 with SMTP id 14mr5232864wmu.52.1495614052785; Wed, 24 May 2017 01:20:52 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id 185sm3645614wmp.1.2017.05.24.01.20.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 24 May 2017 01:20:52 -0700 (PDT) From: Neil Armstrong To: linus.walleij@linaro.org Cc: Neil Armstrong , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] pinctrl: meson-gxl: Add Ethernet PHY LEDS pins Date: Wed, 24 May 2017 10:20:42 +0200 Message-Id: <1495614042-2676-6-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495614042-2676-1-git-send-email-narmstrong@baylibre.com> References: <1495614042-2676-1-git-send-email-narmstrong@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables the Link and Activity LEDs signals. Signed-off-by: Neil Armstrong Reviewed-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 7d81287..78a9af5 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -239,6 +239,9 @@ static const unsigned int spdif_out_h_pins[] = { PIN(GPIOH_4, EE_OFF) }; +static const unsigned int eth_link_led_pins[] = { PIN(GPIOZ_14, EE_OFF) }; +static const unsigned int eth_act_led_pins[] = { PIN(GPIOZ_15, EE_OFF) }; + static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { MESON_PIN(GPIOAO_0, 0), MESON_PIN(GPIOAO_1, 0), @@ -437,6 +440,8 @@ GROUP(i2s_out_ch23_z, 3, 26), GROUP(i2s_out_ch45_z, 3, 25), GROUP(i2s_out_ch67_z, 3, 24), + GROUP(eth_link_led, 4, 25), + GROUP(eth_act_led, 4, 24), /* Bank H */ GROUP(hdmi_hpd, 6, 31), @@ -665,6 +670,10 @@ "spdif_out_h", }; +static const char * const eth_led_groups[] = { + "eth_link_led", "eth_act_led", +}; + static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", @@ -736,6 +745,7 @@ FUNCTION(hdmi_i2c), FUNCTION(i2s_out), FUNCTION(spdif_out), + FUNCTION(eth_led), }; static struct meson_pmx_func meson_gxl_aobus_functions[] = {