From patchwork Wed Oct 19 15:21:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 684189 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3szbK52pjcz9vJ7 for ; Thu, 20 Oct 2016 02:22:17 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=NaQiosWz; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S944889AbcJSPV5 (ORCPT ); Wed, 19 Oct 2016 11:21:57 -0400 Received: from mail-qk0-f182.google.com ([209.85.220.182]:33333 "EHLO mail-qk0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S944637AbcJSPVz (ORCPT ); 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Wed, 19 Oct 2016 08:21:54 -0700 (PDT) Received: from boomer.baylibre.com ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f2sm69725653wjr.2.2016.10.19.08.21.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Oct 2016 08:21:53 -0700 (PDT) From: Jerome Brunet To: Carlo Caione , Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Russell King , Linus Walleij , Catalin Marinas , Will Deacon Subject: [PATCH v2 9/9] ARM: dts: amlogic: enable gpio interrupt controller on meson8 Date: Wed, 19 Oct 2016 17:21:20 +0200 Message-Id: <1476890480-8884-10-git-send-email-jbrunet@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com> References: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Signed-off-by: Jerome Brunet --- arch/arm/boot/dts/meson8.dtsi | 11 +++++++++++ arch/arm/boot/dts/meson8b.dtsi | 11 +++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 45619f6162c5..713a22456ff1 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -43,6 +43,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include +#include #include /include/ "meson.dtsi" @@ -91,6 +93,13 @@ clock-frequency = <141666666>; }; + gpio_interrupt: interrupt-controller@c1109880 { + compatible = "amlogic,meson8-gpio-intc"; + reg = <0xc1109880 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + }; + pinctrl_cbus: pinctrl@c1109880 { compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0xc1109880 0x10>; @@ -106,6 +115,7 @@ reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio_interrupt>; }; spi_nor_pins: nor { @@ -148,6 +158,7 @@ reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio_interrupt>; }; uart_ao_a_pins: uart_ao_a { diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 41fd53671859..36a239a645f5 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -44,6 +44,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include +#include #include #include #include @@ -183,6 +185,13 @@ status = "disabled"; }; + gpio_interrupt: interrupt-controller@c1109880 { + compatible = "amlogic,meson8b-gpio-intc"; + reg = <0xc1109880 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + }; + pinctrl_cbus: pinctrl@c1109880 { compatible = "amlogic,meson8b-cbus-pinctrl"; reg = <0xc1109880 0x10>; @@ -198,6 +207,7 @@ reg-names = "mux", "pull", "pull-enable", "gpio"; gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio_interrupt>; }; }; @@ -215,6 +225,7 @@ reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio_interrupt>; }; uart_ao_a_pins: uart_ao_a {