From patchwork Wed Sep 14 09:45:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 669834 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sYxVp1jv6z9sDG for ; Wed, 14 Sep 2016 19:45:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=qh3nIJF+; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755452AbcINJph (ORCPT ); Wed, 14 Sep 2016 05:45:37 -0400 Received: from mail-wm0-f53.google.com ([74.125.82.53]:35953 "EHLO mail-wm0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751621AbcINJpf (ORCPT ); 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Wed, 14 Sep 2016 02:45:34 -0700 (PDT) Received: from mogwai.baylibre.com ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id i131sm3258480wmg.10.2016.09.14.02.45.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Sep 2016 02:45:33 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH] pintctrl: amlogic: gxbb: add i2c pins Date: Wed, 14 Sep 2016 11:45:28 +0200 Message-Id: <1473846328-17339-1-git-send-email-jbrunet@baylibre.com> X-Mailer: git-send-email 2.7.4 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add EE domains pins for the i2c devices A,B,C Signed-off-by: Jerome Brunet Acked-by: Kevin Hilman --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index b06cc12f2500..c3928aa3fefa 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -200,6 +200,15 @@ static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) }; static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) }; static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) }; +static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) }; + +static const unsigned int i2c_sck_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; +static const unsigned int i2c_sda_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; + +static const unsigned int i2c_sck_c_pins[] = { PIN(GPIODV_29, EE_OFF) }; +static const unsigned int i2c_sda_c_pins[] = { PIN(GPIODV_28, EE_OFF) }; + static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; @@ -438,6 +447,12 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GROUP(uart_rts_b, 2, 26), GROUP(pwm_b, 3, 21), GROUP(pwm_d, 3, 20), + GROUP(i2c_sck_a, 7, 27), + GROUP(i2c_sda_a, 7, 26), + GROUP(i2c_sck_b, 7, 25), + GROUP(i2c_sda_b, 7, 24), + GROUP(i2c_sck_c, 7, 23), + GROUP(i2c_sda_c, 7, 22), /* Bank BOOT */ GROUP(emmc_nand_d07, 4, 30), @@ -574,6 +589,18 @@ static const char * const uart_c_groups[] = { "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", }; +static const char * const i2c_a_groups[] = { + "i2c_sck_a", "i2c_sda_a", +}; + +static const char * const i2c_b_groups[] = { + "i2c_sck_b", "i2c_sda_b", +}; + +static const char * const i2c_c_groups[] = { + "i2c_sck_c", "i2c_sda_c", +}; + static const char * const eth_groups[] = { "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", @@ -661,6 +688,9 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(uart_a), FUNCTION(uart_b), FUNCTION(uart_c), + FUNCTION(i2c_a), + FUNCTION(i2c_b), + FUNCTION(i2c_c), FUNCTION(eth), FUNCTION(pwm_a_x), FUNCTION(pwm_a_y),