From patchwork Mon Aug 22 14:41:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 661496 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sHx8W0Rm7z9s36 for ; Tue, 23 Aug 2016 00:41:15 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=1ruLpCpX; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755469AbcHVOlN (ORCPT ); Mon, 22 Aug 2016 10:41:13 -0400 Received: from mail-wm0-f44.google.com ([74.125.82.44]:37266 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755112AbcHVOlM (ORCPT ); Mon, 22 Aug 2016 10:41:12 -0400 Received: by mail-wm0-f44.google.com with SMTP id i5so148325256wmg.0 for ; Mon, 22 Aug 2016 07:41:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JnHiUb5m2/CDwC2hfDQkgMCeaVlk4+gSDAjoA0lhGRM=; b=1ruLpCpXrNx/Noq3htqdX44lHuAnUmmptZsIT3hAR8A8nJNAFx7JgAatwbdOXUgFux ZpD+DNb81O22wDW/DRUuGn2Z+a1G7Ul3Hucu7ErDREGYkD0/Rr1ThwjT1Ahakh4gp85g xZcd2o5x6WSoR3HIBVlKAO7nH1eUKMte5Jar0kQG5hAB0SlKjGfyHVTz06Ur5BxeCc0k b2BoQkyHgo5QB+XI2GjFWjqga8vCxHctfbPG2Ek5Zcnw41tpKH0qv4k5k2jepbx/4FZS XREb1SW2XA7EB8bhokIBhzXf6rWS1eTC+kcB0Of9xB5nKZTv3CRnkzqUc7gYB0xOC7O1 wskg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JnHiUb5m2/CDwC2hfDQkgMCeaVlk4+gSDAjoA0lhGRM=; b=DeYU1w7eQbnVHLiBxAVTXXceoW10IzGf/ZLRs782NSsn+GPLmLhStjFTLHsgC9ip60 wW5vfulAAoyQPhQIv7zmAu52uP/SGbyt+ULdRpHfuyi+jBhJrZK/8KpxKiLqUmqSpTgW VAVZHD/Fx/peqlr+0LGvJNS6PgtS+l4FWg/9wCfuZrT/gIEGiQFOBv6yb7wDJ8tm1UHc bHxAsfvSo1rFtyhS7Xu+/ItTGfCdVt1jWIcoH65JYLEH+DFgVGQaPjYu9Smm019LEids YI81KLsJouIaGpyPUR5jzqrB2F4PbyQHBO7UF/AY87i54WL1MCPO03gfo9XoaN944X1P xAoQ== X-Gm-Message-State: AEkoouv2MDsk5o683+v4sfzh3TWngIX9hVYkpNCCB4lL36Ns1UpEW4jaxKy1qu7bZN8h/O53 X-Received: by 10.194.70.165 with SMTP id n5mr17701958wju.135.1471876867533; Mon, 22 Aug 2016 07:41:07 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id w129sm21835255wmd.9.2016.08.22.07.41.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 22 Aug 2016 07:41:06 -0700 (PDT) From: Neil Armstrong To: linus.walleij@linaro.org, khilman@baylibre.com, carlo@caione.org, devicetree@vger.kernel.org Cc: Neil Armstrong , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [RESEND PATCH 2/2] ARM64: dts: meson-gxbb: Add PWM pinctrl nodes Date: Mon, 22 Aug 2016 16:41:00 +0200 Message-Id: <1471876860-5620-3-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471876860-5620-1-git-send-email-narmstrong@baylibre.com> References: <1471876860-5620-1-git-send-email-narmstrong@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add DT nodes for PWMs in EE and AO domains. Acked-by: Linus Walleij Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 77 +++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index e502c24..9aeb88a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -203,6 +203,34 @@ function = "uart_ao"; }; }; + + pwm_ao_a_3_pins: pwm_ao_a_3 { + mux { + groups = "pwm_ao_a_3"; + function = "pwm_ao_a_3"; + }; + }; + + pwm_ao_a_6_pins: pwm_ao_a_6 { + mux { + groups = "pwm_ao_a_6"; + function = "pwm_ao_a_6"; + }; + }; + + pwm_ao_a_12_pins: pwm_ao_a_12 { + mux { + groups = "pwm_ao_a_12"; + function = "pwm_ao_a_12"; + }; + }; + + pwm_ao_b_pins: pwm_ao_b { + mux { + groups = "pwm_ao_b"; + function = "pwm_ao_b"; + }; + }; }; uart_AO: serial@4c0 { @@ -306,6 +334,55 @@ function = "eth"; }; }; + + pwm_a_x_pins: pwm_a_x { + mux { + groups = "pwm_a_x"; + function = "pwm_a_x"; + }; + }; + + pwm_a_y_pins: pwm_a_y { + mux { + groups = "pwm_a_y"; + function = "pwm_a_y"; + }; + }; + + pwm_b_pins: pwm_b { + mux { + groups = "pwm_b"; + function = "pwm_b"; + }; + }; + + pwm_d_pins: pwm_d { + mux { + groups = "pwm_d"; + function = "pwm_d"; + }; + }; + + pwm_e_pins: pwm_e { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; + + pwm_f_x_pins: pwm_f_x { + mux { + groups = "pwm_f_x"; + function = "pwm_f_x"; + }; + }; + + pwm_f_y_pins: pwm_f_y { + mux { + groups = "pwm_f_y"; + function = "pwm_f_y"; + }; + }; }; };