| Message ID | 1432732314-372-3-git-send-email-jonathanh@nvidia.com |
|---|---|
| State | New |
| Headers | show |
On Wed, May 27, 2015 at 3:11 PM, Jon Hunter <jonathanh@nvidia.com> wrote: > Commit e5b3b2d9ed20 ("pinctrl: allows not to define the get_group_pins > operation") allows pin controllers not to register the get_group_pins() > function. However, a side-effect of not registering this function is > that pins are not allocated and potentially multiple devices could > attempt to configure the same pins [1]. Although this problem exists in > the pinctrl core, because only a few devices are impacted by this, fix > this for tegra-xusb by adding the get_group_pins() function. > > Please note that in addition to adding the get_group_pins() functions > the pins/lanes for the tegra-xusb also need to be registered when > calling pinctrl_register(). This also allows the current pinmux state > to be viewed by the debugfs node "pinmux-pins" for the tegra-xusb pad > controller. > > [1] http://www.spinics.net/lists/linux-gpio/msg05810.html > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > Acked-by: Thierry Reding <treding@nvidia.com> Patch applied. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c b/drivers/pinctrl/pinctrl-tegra-xusb.c index 3e8e4a914fb4..6a6eebfb2930 100644 --- a/drivers/pinctrl/pinctrl-tegra-xusb.c +++ b/drivers/pinctrl/pinctrl-tegra-xusb.c @@ -125,6 +125,21 @@ static const char *tegra_xusb_padctl_get_group_name(struct pinctrl_dev *pinctrl, return padctl->soc->pins[group].name; } +static int tegra_xusb_padctl_get_group_pins(struct pinctrl_dev *pinctrl, + unsigned group, + const unsigned **pins, + unsigned *num_pins) +{ + /* + * For the tegra-xusb pad controller groups are synonomous + * with lanes/pins and there is always one lane/pin per group. + */ + *pins = &pinctrl->desc->pins[group].number; + *num_pins = 1; + + return 0; +} + enum tegra_xusb_padctl_param { TEGRA_XUSB_PADCTL_IDDQ, }; @@ -248,6 +263,7 @@ static int tegra_xusb_padctl_dt_node_to_map(struct pinctrl_dev *pinctrl, static const struct pinctrl_ops tegra_xusb_padctl_pinctrl_ops = { .get_groups_count = tegra_xusb_padctl_get_groups_count, .get_group_name = tegra_xusb_padctl_get_group_name, + .get_group_pins = tegra_xusb_padctl_get_group_pins, .dt_node_to_map = tegra_xusb_padctl_dt_node_to_map, .dt_free_map = pinctrl_utils_dt_free_map, }; @@ -898,6 +914,8 @@ static int tegra_xusb_padctl_probe(struct platform_device *pdev) memset(&padctl->desc, 0, sizeof(padctl->desc)); padctl->desc.name = dev_name(padctl->dev); + padctl->desc.pins = tegra124_pins; + padctl->desc.npins = ARRAY_SIZE(tegra124_pins); padctl->desc.pctlops = &tegra_xusb_padctl_pinctrl_ops; padctl->desc.pmxops = &tegra_xusb_padctl_pinmux_ops; padctl->desc.confops = &tegra_xusb_padctl_pinconf_ops;
Commit e5b3b2d9ed20 ("pinctrl: allows not to define the get_group_pins operation") allows pin controllers not to register the get_group_pins() function. However, a side-effect of not registering this function is that pins are not allocated and potentially multiple devices could attempt to configure the same pins [1]. Although this problem exists in the pinctrl core, because only a few devices are impacted by this, fix this for tegra-xusb by adding the get_group_pins() function. Please note that in addition to adding the get_group_pins() functions the pins/lanes for the tegra-xusb also need to be registered when calling pinctrl_register(). This also allows the current pinmux state to be viewed by the debugfs node "pinmux-pins" for the tegra-xusb pad controller. [1] http://www.spinics.net/lists/linux-gpio/msg05810.html Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> --- drivers/pinctrl/pinctrl-tegra-xusb.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)