| Message ID | 1432586391-27634-1-git-send-email-martin.blumenstingl@googlemail.com |
|---|---|
| State | New |
| Headers | show |
On 25/05/2015 22:39, Martin Blumenstingl wrote: > 0x3 only masks two bits, but three bits have to be allowed. This fixes > GPHY0 LED2 (which is the highest bit of phy2) on my board. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: John Crispin <blogic@openwrt.org> > --- > drivers/gpio/gpio-stp-xway.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c > index 202361e..6d4148f 100644 > --- a/drivers/gpio/gpio-stp-xway.c > +++ b/drivers/gpio/gpio-stp-xway.c > @@ -58,7 +58,7 @@ > #define XWAY_STP_ADSL_MASK 0x3 > > /* 2 groups of 3 bits can be driven by the phys */ > -#define XWAY_STP_PHY_MASK 0x3 > +#define XWAY_STP_PHY_MASK 0x7 > #define XWAY_STP_PHY1_SHIFT 27 > #define XWAY_STP_PHY2_SHIFT 15 > > -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, May 25, 2015 at 10:39 PM, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > 0x3 only masks two bits, but three bits have to be allowed. This fixes > GPHY0 LED2 (which is the highest bit of phy2) on my board. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Patch applied with John's ACK. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index 202361e..6d4148f 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -58,7 +58,7 @@ #define XWAY_STP_ADSL_MASK 0x3 /* 2 groups of 3 bits can be driven by the phys */ -#define XWAY_STP_PHY_MASK 0x3 +#define XWAY_STP_PHY_MASK 0x7 #define XWAY_STP_PHY1_SHIFT 27 #define XWAY_STP_PHY2_SHIFT 15
0x3 only masks two bits, but three bits have to be allowed. This fixes GPHY0 LED2 (which is the highest bit of phy2) on my board. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- drivers/gpio/gpio-stp-xway.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)