| Message ID | 1425933902-20652-8-git-send-email-rjui@broadcom.com |
|---|---|
| State | New |
| Headers | show |
On Mon, Mar 9, 2015 at 9:45 PM, Ray Jui <rjui@broadcom.com> wrote: > This enables all 3 GPIO controllers including the ASIU GPIO, the > chipcommonG GPIO, and the ALWAYS-ON GPIO, for Broadcom Cygnus SoC > > Signed-off-by: Ray Jui <rjui@broadcom.com> > Reviewed-by: Scott Branden <sbranden@broadcom.com> > Tested-by: Dmitry Torokhov <dtor@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Pls take this through ARM SoC. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
2015-03-10 3:21 GMT-07:00 Linus Walleij <linus.walleij@linaro.org>: > On Mon, Mar 9, 2015 at 9:45 PM, Ray Jui <rjui@broadcom.com> wrote: > >> This enables all 3 GPIO controllers including the ASIU GPIO, the >> chipcommonG GPIO, and the ALWAYS-ON GPIO, for Broadcom Cygnus SoC >> >> Signed-off-by: Ray Jui <rjui@broadcom.com> >> Reviewed-by: Scott Branden <sbranden@broadcom.com> >> Tested-by: Dmitry Torokhov <dtor@chromium.org> > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > Pls take this through ARM SoC. Applied to devicetree/next. -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 1cbae6a..63b7fed 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -60,6 +60,36 @@ <0x0301d24c 0x2c>; }; + gpio_crmu: gpio@03024800 { + compatible = "brcm,cygnus-crmu-gpio"; + reg = <0x03024800 0x50>, + <0x03024008 0x18>; + #gpio-cells = <2>; + gpio-controller; + }; + + gpio_ccm: gpio@1800a000 { + compatible = "brcm,cygnus-ccm-gpio"; + reg = <0x1800a000 0x50>, + <0x0301d164 0x20>; + #gpio-cells = <2>; + gpio-controller; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + }; + + gpio_asiu: gpio@180a5000 { + compatible = "brcm,cygnus-asiu-gpio"; + reg = <0x180a5000 0x668>; + #gpio-cells = <2>; + gpio-controller; + + pinmux = <&pinctrl>; + + interrupt-controller; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + }; + amba { #address-cells = <1>; #size-cells = <1>;