From patchwork Wed Dec 8 01:33:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tommy Huang X-Patchwork-Id: 1565043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4J808w6yKPz9ssD for ; Wed, 8 Dec 2021 12:35:12 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4J808w5ntrz300S for ; Wed, 8 Dec 2021 12:35:12 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.71; helo=twspam01.aspeedtech.com; envelope-from=tommy_huang@aspeedtech.com; receiver=) Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4J808t13xwz2yXv for ; Wed, 8 Dec 2021 12:35:09 +1100 (AEDT) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 1B818luB089267; Wed, 8 Dec 2021 09:08:47 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 8 Dec 2021 09:33:45 +0800 From: Tommy Haung To: , , , , , , , , , Subject: [PATCH v5 7/7] dt-bindings:ast2600-clock Add CRT reset define Date: Wed, 8 Dec 2021 09:33:37 +0800 Message-ID: <20211208013337.13806-8-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208013337.13806-1-tommy_huang@aspeedtech.com> References: <20211208013337.13806-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 1B818luB089267 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Add new CRT reset define for ast2600. Reported-by: kernel test robot Signed-off-by: Tommy Haung Acked-by: Rob Herring --- include/dt-bindings/clock/ast2600-clock.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h index 62b9520a00fd..f8bee338a00f 100644 --- a/include/dt-bindings/clock/ast2600-clock.h +++ b/include/dt-bindings/clock/ast2600-clock.h @@ -110,6 +110,7 @@ #define ASPEED_RESET_PCIE_DEV_OEN 20 #define ASPEED_RESET_PCIE_RC_O 19 #define ASPEED_RESET_PCIE_RC_OEN 18 +#define ASPEED_RESET_CRT 13 #define ASPEED_RESET_PCI_DP 5 #define ASPEED_RESET_AHB 1 #define ASPEED_RESET_SDRAM 0