| Message ID | 20210503014336.20256-3-steven_lee@aspeedtech.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/3] dt-bindings: mmc: sdhci-of-aspeed: Add description for AST2600 EVB. | expand |
Hi Steven, On Mon, 3 May 2021, at 11:13, Steven Lee wrote: > Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs. > > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> > --- > arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > index 2772796e215e..7a93317e27dc 100644 > --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > @@ -102,6 +102,7 @@ > > &emmc_controller { > status = "okay"; > + timing-phase = <0x300FF>; Please use the existing binding for phase corrections. The existing binding is already supported by the driver (added in v5.12). Andrew
The 05/03/2021 13:07, Andrew Jeffery wrote: > Hi Steven, > > On Mon, 3 May 2021, at 11:13, Steven Lee wrote: > > Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs. > > > > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> > > --- > > arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > index 2772796e215e..7a93317e27dc 100644 > > --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > @@ -102,6 +102,7 @@ > > > > &emmc_controller { > > status = "okay"; > > + timing-phase = <0x300FF>; > > Please use the existing binding for phase corrections. The existing > binding is already supported by the driver (added in v5.12). > Hi Andrew, Thanks for the review. I will add the following settings from aspeed-bmc-ibm-rainier.dts instead of adding timing-phase in device tree. clk-phase-mmc-hs200 = <N> <N>; > Andrew
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts index 2772796e215e..7a93317e27dc 100644 --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts @@ -102,6 +102,7 @@ &emmc_controller { status = "okay"; + timing-phase = <0x300FF>; }; &emmc {
Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> --- arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 + 1 file changed, 1 insertion(+)