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[00/45] clk: Make sure clk_init_data is fully initialized (part two)

Message ID cover.1787239813.git.geert+renesas@glider.be
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Series clk: Make sure clk_init_data is fully initialized (part two) | expand

Message

Geert Uytterhoeven Aug. 21, 2026, 8:53 a.m. UTC 
Hi all,

The clk_init_data structure contains several mutually-exclusive members
for different methods to specify the possible parents of a clock,
prompting drivers to initialize only the members they need.  However,
not initializing all members may cause subtle issues, which are only
exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
enabled.

Hence this series aims to make sure all members are fully initialized,
to avoid such bugs, and to prevent future breakage when converting
drivers to a different method for specifying the parents.

Part One[1] fixed all cases that I identified to be real bugs, in
response to a crash I saw on BeagleBone Black.

This series is the clock subpart of Part Two, which fixes remaining
cases that are currently harmless.  These are still fragile, and may
cause future breakage when converting drivers to a different method for
specifying the parents.

Thanks for your comments!

[1] "[PATCH treewide 0/5] clk: Make sure clk_init_data is fully
     initialized (part 1)"
    https://lore.kernel.org/cover.1787165329.git.geert+renesas@glider.be

Geert Uytterhoeven (45):
  clk: aspeed: Make sure clk_init_data is fully initialized
  clk: at91: Make sure clk_init_data is fully initialized
  clk: bcm: iproc: Make sure clk_init_data is fully initialized
  clk: berlin: Make sure clk_init_data is fully initialized
  clk: cdce925: Make sure clk_init_data is fully initialized
  clk: clk-axi-clkgen: Make sure clk_init_data is fully initialized
  clk: cs2000-cp: Make sure clk_init_data is fully initialized
  clk: davinci: Make sure clk_init_data is fully initialized
  clk: fractional-divider: Make sure clk_init_data is fully initialized
  clk: gemini: Make sure clk_init_data is fully initialized
  clk: highbank: Make sure clk_init_data is fully initialized
  clk: hisilicon: Make sure clk_init_data is fully initialized
  clk: imx: Make sure clk_init_data is fully initialized
  clk: ingenic: Make sure clk_init_data is fully initialized
  clk: keystone: Make sure clk_init_data is fully initialized
  clk: lmk04832: Make sure clk_init_data is fully initialized
  clk: mediatek: Make sure clk_init_data is fully initialized
  clk: milbeaut: Make sure clk_init_data is fully initialized
  clk: mmp: Make sure clk_init_data is fully initialized
  clk: mvebu: Make sure clk_init_data is fully initialized
  clk: mxs: Make sure clk_init_data is fully initialized
  clk: nomadik: Make sure clk_init_data is fully initialized
  clk: npcm7xx: Make sure clk_init_data is fully initialized
  clk: nxp: Make sure clk_init_data is fully initialized
  clk: pistachio: Make sure clk_init_data is fully initialized
  clk: pwm: Make sure clk_init_data is fully initialized
  clk: renesas: Make sure clk_init_data is fully initialized
  clk: rockchip: Make sure clk_init_data is fully initialized
  clk: samsung: Make sure clk_init_data is fully initialized
  clk: scpi: Make sure clk_init_data is fully initialized
  clk: silabs: Make sure clk_init_data is fully initialized
  clk: socfpga: Make sure clk_init_data is fully initialized
  clk: spear: Make sure clk_init_data is fully initialized
  clk: stm32: Make sure clk_init_data is fully initialized
  clk: st: Make sure clk_init_data is fully initialized
  clk: sunxi: Make sure clk_init_data is fully initialized
  clk: tegra: Make sure clk_init_data is fully initialized
  clk: uniphier: Make sure clk_init_data is fully initialized
  clk: ux500: Make sure clk_init_data is fully initialized
  clk: versatile: Make sure clk_init_data is fully initialized
  clk: vt8500: Make sure clk_init_data is fully initialized
  clk: x86: Make sure clk_init_data is fully initialized
  clk: xgene: Make sure clk_init_data is fully initialized
  clk: xilinx: Make sure clk_init_data is fully initialized
  clk: zynqmp: Make sure clk_init_data is fully initialized

 drivers/clk/aspeed/clk-aspeed.c                |  2 +-
 drivers/clk/aspeed/clk-ast2600.c               |  2 +-
 drivers/clk/aspeed/clk-ast2700.c               |  2 +-
 drivers/clk/at91/clk-audio-pll.c               |  4 ++--
 drivers/clk/at91/clk-h32mx.c                   |  2 +-
 drivers/clk/at91/clk-main.c                    |  2 +-
 drivers/clk/at91/clk-pll.c                     |  2 +-
 drivers/clk/at91/clk-plldiv.c                  |  2 +-
 drivers/clk/at91/clk-slow.c                    |  2 +-
 drivers/clk/at91/clk-smd.c                     |  2 +-
 drivers/clk/at91/clk-usb.c                     |  6 +++---
 drivers/clk/at91/sckc.c                        |  2 +-
 drivers/clk/bcm/clk-iproc-armpll.c             |  2 +-
 drivers/clk/bcm/clk-iproc-asiu.c               |  2 +-
 drivers/clk/bcm/clk-iproc-pll.c                |  2 +-
 drivers/clk/berlin/berlin2-avpll.c             |  4 ++--
 drivers/clk/berlin/berlin2-pll.c               |  2 +-
 drivers/clk/clk-axi-clkgen.c                   |  2 +-
 drivers/clk/clk-cdce925.c                      |  2 +-
 drivers/clk/clk-cs2000-cp.c                    |  2 +-
 drivers/clk/clk-fractional-divider.c           |  2 +-
 drivers/clk/clk-gemini.c                       |  2 +-
 drivers/clk/clk-highbank.c                     |  2 +-
 drivers/clk/clk-lmk04832.c                     |  6 +++---
 drivers/clk/clk-milbeaut.c                     |  4 ++--
 drivers/clk/clk-nomadik.c                      |  4 ++--
 drivers/clk/clk-npcm7xx.c                      |  2 +-
 drivers/clk/clk-pwm.c                          |  2 +-
 drivers/clk/clk-scpi.c                         |  2 +-
 drivers/clk/clk-si514.c                        |  2 +-
 drivers/clk/clk-si5341.c                       |  2 +-
 drivers/clk/clk-si544.c                        |  2 +-
 drivers/clk/clk-si570.c                        |  2 +-
 drivers/clk/clk-stm32f4.c                      |  4 ++--
 drivers/clk/clk-stm32h7.c                      |  2 +-
 drivers/clk/clk-vt8500.c                       |  4 ++--
 drivers/clk/clk-xgene.c                        |  6 +++---
 drivers/clk/davinci/da8xx-cfgchip.c            |  4 ++--
 drivers/clk/davinci/pll.c                      |  2 +-
 drivers/clk/davinci/psc.c                      |  2 +-
 drivers/clk/hisilicon/clk-hi3559a.c            |  2 +-
 drivers/clk/hisilicon/clk-hi3620.c             |  2 +-
 drivers/clk/hisilicon/clk-hi6220-stub.c        |  2 +-
 drivers/clk/hisilicon/clk-hisi-phase.c         |  2 +-
 drivers/clk/hisilicon/clk-hix5hd2.c            |  2 +-
 drivers/clk/hisilicon/clkdivider-hi6220.c      |  2 +-
 drivers/clk/hisilicon/clkgate-separated.c      |  2 +-
 drivers/clk/imx/clk-busy.c                     |  4 ++--
 drivers/clk/imx/clk-cpu.c                      |  2 +-
 drivers/clk/imx/clk-divider-gate.c             |  2 +-
 drivers/clk/imx/clk-fixup-div.c                |  2 +-
 drivers/clk/imx/clk-fixup-mux.c                |  2 +-
 drivers/clk/imx/clk-frac-pll.c                 |  2 +-
 drivers/clk/imx/clk-fracn-gppll.c              |  2 +-
 drivers/clk/imx/clk-gate-93.c                  |  2 +-
 drivers/clk/imx/clk-gate-exclusive.c           |  2 +-
 drivers/clk/imx/clk-gate2.c                    |  2 +-
 drivers/clk/imx/clk-lpcg-scu.c                 |  2 +-
 drivers/clk/imx/clk-pfd.c                      |  2 +-
 drivers/clk/imx/clk-pfdv2.c                    |  2 +-
 drivers/clk/imx/clk-pll14xx.c                  |  2 +-
 drivers/clk/imx/clk-pllv1.c                    |  2 +-
 drivers/clk/imx/clk-pllv2.c                    |  2 +-
 drivers/clk/imx/clk-pllv3.c                    |  2 +-
 drivers/clk/imx/clk-pllv4.c                    |  2 +-
 drivers/clk/imx/clk-scu.c                      |  4 ++--
 drivers/clk/imx/clk-sscg-pll.c                 |  2 +-
 drivers/clk/ingenic/cgu.c                      |  2 +-
 drivers/clk/keystone/gate.c                    |  2 +-
 drivers/clk/keystone/pll.c                     |  2 +-
 drivers/clk/keystone/syscon-clk.c              |  2 +-
 drivers/clk/mediatek/clk-cpumux.c              |  2 +-
 drivers/clk/mmp/clk-apbc.c                     |  2 +-
 drivers/clk/mmp/clk-apmu.c                     |  2 +-
 drivers/clk/mmp/clk-frac.c                     |  2 +-
 drivers/clk/mmp/clk-gate.c                     |  2 +-
 drivers/clk/mmp/clk-mix.c                      |  2 +-
 drivers/clk/mmp/clk-pll.c                      |  2 +-
 drivers/clk/mvebu/ap-cpu-clk.c                 |  2 +-
 drivers/clk/mvebu/clk-corediv.c                |  2 +-
 drivers/clk/mvebu/clk-cpu.c                    |  2 +-
 drivers/clk/mxs/clk-div.c                      |  2 +-
 drivers/clk/mxs/clk-frac.c                     |  2 +-
 drivers/clk/mxs/clk-pll.c                      |  2 +-
 drivers/clk/mxs/clk-ref.c                      |  2 +-
 drivers/clk/nxp/clk-lpc18xx-creg.c             |  2 +-
 drivers/clk/pistachio/clk-pll.c                |  2 +-
 drivers/clk/renesas/rzg2l-cpg.c                | 18 +++++++++---------
 drivers/clk/renesas/rzv2h-cpg.c                |  8 ++++----
 drivers/clk/rockchip/clk-cpu.c                 |  2 +-
 drivers/clk/rockchip/clk-ddr.c                 |  2 +-
 drivers/clk/rockchip/clk-gate-grf.c            |  2 +-
 drivers/clk/rockchip/clk-inverter.c            |  2 +-
 drivers/clk/rockchip/clk-mmc-phase.c           |  2 +-
 drivers/clk/rockchip/clk-muxgrf.c              |  2 +-
 drivers/clk/rockchip/clk-pll.c                 |  2 +-
 drivers/clk/rockchip/clk.c                     |  2 +-
 drivers/clk/samsung/clk-cpu.c                  |  2 +-
 drivers/clk/samsung/clk-pll.c                  |  2 +-
 drivers/clk/socfpga/clk-gate-a10.c             |  2 +-
 drivers/clk/socfpga/clk-gate-s10.c             |  6 +++---
 drivers/clk/socfpga/clk-gate.c                 |  2 +-
 drivers/clk/socfpga/clk-periph-a10.c           |  2 +-
 drivers/clk/socfpga/clk-periph-s10.c           |  8 ++++----
 drivers/clk/socfpga/clk-periph.c               |  2 +-
 drivers/clk/socfpga/clk-pll-a10.c              |  2 +-
 drivers/clk/socfpga/clk-pll-s10.c              |  8 ++++----
 drivers/clk/socfpga/clk-pll.c                  |  2 +-
 drivers/clk/spear/clk-aux-synth.c              |  2 +-
 drivers/clk/spear/clk-frac-synth.c             |  2 +-
 drivers/clk/spear/clk-gpt-synth.c              |  2 +-
 drivers/clk/spear/clk-vco-pll.c                |  2 +-
 drivers/clk/st/clk-flexgen.c                   |  2 +-
 drivers/clk/st/clkgen-fsyn.c                   |  4 ++--
 drivers/clk/st/clkgen-pll.c                    |  2 +-
 drivers/clk/stm32/clk-stm32mp1.c               |  4 ++--
 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c         |  2 +-
 drivers/clk/tegra/clk-audio-sync.c             |  2 +-
 drivers/clk/tegra/clk-divider.c                |  2 +-
 drivers/clk/tegra/clk-periph-fixed.c           |  2 +-
 drivers/clk/tegra/clk-periph-gate.c            |  2 +-
 drivers/clk/tegra/clk-periph.c                 |  2 +-
 drivers/clk/tegra/clk-pll-out.c                |  2 +-
 drivers/clk/tegra/clk-pll.c                    |  2 +-
 drivers/clk/tegra/clk-sdmmc-mux.c              |  2 +-
 drivers/clk/tegra/clk-super.c                  |  4 ++--
 drivers/clk/tegra/clk-tegra-super-cclk.c       |  2 +-
 drivers/clk/tegra/clk-tegra124-emc.c           |  2 +-
 drivers/clk/tegra/clk-tegra20-emc.c            |  2 +-
 drivers/clk/tegra/clk-tegra210-emc.c           |  2 +-
 drivers/clk/uniphier/clk-uniphier-cpugear.c    |  2 +-
 .../clk/uniphier/clk-uniphier-fixed-factor.c   |  2 +-
 drivers/clk/uniphier/clk-uniphier-fixed-rate.c |  2 +-
 drivers/clk/uniphier/clk-uniphier-gate.c       |  2 +-
 drivers/clk/uniphier/clk-uniphier-mux.c        |  2 +-
 drivers/clk/ux500/clk-prcc.c                   |  2 +-
 drivers/clk/ux500/clk-prcmu.c                  |  4 ++--
 drivers/clk/ux500/clk-sysctrl.c                |  2 +-
 drivers/clk/versatile/clk-icst.c               |  2 +-
 drivers/clk/versatile/clk-sp810.c              |  2 +-
 drivers/clk/versatile/clk-vexpress-osc.c       |  2 +-
 drivers/clk/x86/clk-pmc-atom.c                 |  2 +-
 drivers/clk/xilinx/clk-xlnx-clock-wizard.c     |  6 +++---
 drivers/clk/xilinx/xlnx_vcu.c                  |  2 +-
 drivers/clk/zynqmp/clk-gate-zynqmp.c           |  2 +-
 drivers/clk/zynqmp/clk-mux-zynqmp.c            |  2 +-
 drivers/clk/zynqmp/divider.c                   |  2 +-
 drivers/clk/zynqmp/pll.c                       |  2 +-
 148 files changed, 188 insertions(+), 188 deletions(-)

Comments

Brian Masney Aug. 24, 2026, 3:14 p.m. UTC | #1 
On Fri, Aug 21, 2026 at 10:53:10AM +0200, Geert Uytterhoeven wrote:
> 	Hi all,
> 
> The clk_init_data structure contains several mutually-exclusive members
> for different methods to specify the possible parents of a clock,
> prompting drivers to initialize only the members they need.  However,
> not initializing all members may cause subtle issues, which are only
> exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> enabled.
> 
> Hence this series aims to make sure all members are fully initialized,
> to avoid such bugs, and to prevent future breakage when converting
> drivers to a different method for specifying the parents.
> 
> Part One[1] fixed all cases that I identified to be real bugs, in
> response to a crash I saw on BeagleBone Black.
> 
> This series is the clock subpart of Part Two, which fixes remaining
> cases that are currently harmless.  These are still fragile, and may
> cause future breakage when converting drivers to a different method for
> specifying the parents.
> 
> Thanks for your comments!
> 
> [1] "[PATCH treewide 0/5] clk: Make sure clk_init_data is fully
>      initialized (part 1)"
>     https://lore.kernel.org/cover.1787165329.git.geert+renesas@glider.be

Thanks for cleaning this all up! For the series:

Reviewed-by: Brian Masney <bmasney@redhat.com>
Heiko Stuebner Aug. 24, 2026, 9:11 p.m. UTC | #2 
Hi Geert,

Am Freitag, 21. August 2026, 10:53:10 Mitteleuropäische Sommerzeit schrieb Geert Uytterhoeven:
> 	Hi all,
> 
> The clk_init_data structure contains several mutually-exclusive members
> for different methods to specify the possible parents of a clock,
> prompting drivers to initialize only the members they need.  However,
> not initializing all members may cause subtle issues, which are only
> exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> enabled.
> 
> Hence this series aims to make sure all members are fully initialized,
> to avoid such bugs, and to prevent future breakage when converting
> drivers to a different method for specifying the parents.
> 
> Part One[1] fixed all cases that I identified to be real bugs, in
> response to a crash I saw on BeagleBone Black.
> 
> This series is the clock subpart of Part Two, which fixes remaining
> cases that are currently harmless.  These are still fragile, and may
> cause future breakage when converting drivers to a different method for
> specifying the parents.
> 
> Thanks for your comments!

I guess more a handling question, how do you expect this series to be
applied?

I.e. each clk-arch-maintainer, or in one big thing by the core clock
maintainers? Just wondering if I should pick the Rockchip patch
or just let the whole series get applied by the clock maintainers.


Heiko
Brian Masney Aug. 25, 2026, 3:11 p.m. UTC | #3 
Hi Heiko,

On Mon, Aug 24, 2026 at 11:11:32PM +0200, Heiko Stübner wrote:
> Am Freitag, 21. August 2026, 10:53:10 Mitteleuropäische Sommerzeit schrieb Geert Uytterhoeven:
> > 	Hi all,
> > 
> > The clk_init_data structure contains several mutually-exclusive members
> > for different methods to specify the possible parents of a clock,
> > prompting drivers to initialize only the members they need.  However,
> > not initializing all members may cause subtle issues, which are only
> > exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> > enabled.
> > 
> > Hence this series aims to make sure all members are fully initialized,
> > to avoid such bugs, and to prevent future breakage when converting
> > drivers to a different method for specifying the parents.
> > 
> > Part One[1] fixed all cases that I identified to be real bugs, in
> > response to a crash I saw on BeagleBone Black.
> > 
> > This series is the clock subpart of Part Two, which fixes remaining
> > cases that are currently harmless.  These are still fragile, and may
> > cause future breakage when converting drivers to a different method for
> > specifying the parents.
> > 
> > Thanks for your comments!
> 
> I guess more a handling question, how do you expect this series to be
> applied?
> 
> I.e. each clk-arch-maintainer, or in one big thing by the core clock
> maintainers? Just wondering if I should pick the Rockchip patch
> or just let the whole series get applied by the clock maintainers.

Before you pick up anything, let's see if Stephen picks up this series
the next few days before he sends his pull to Linus.

Next development cycle, Jerome Brunet and I will be clk co-maintainers
[1] and will start collecting patches then. If Stephen doesn't pick up
this whole series this week, then pick up the patch(es) relevant for
your tree and send Jerome and I pull as usual. That's just in case
there's other patches that come in during the next development cycle to
these files and to avoid merge conflicts. I don't have a strong opinion
about this though, and could be convinced to take the whole series for
simplicity.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/commit/?h=clk-next&id=8bc7ceadce1f362a8b0e88075ef3d926b286c01c

Brian
Heiko Stuebner Aug. 25, 2026, 3:28 p.m. UTC | #4 
Am Dienstag, 25. August 2026, 17:11:47 Mitteleuropäische Sommerzeit schrieb Brian Masney:
> Hi Heiko,
> 
> On Mon, Aug 24, 2026 at 11:11:32PM +0200, Heiko Stübner wrote:
> > Am Freitag, 21. August 2026, 10:53:10 Mitteleuropäische Sommerzeit schrieb Geert Uytterhoeven:
> > > 	Hi all,
> > > 
> > > The clk_init_data structure contains several mutually-exclusive members
> > > for different methods to specify the possible parents of a clock,
> > > prompting drivers to initialize only the members they need.  However,
> > > not initializing all members may cause subtle issues, which are only
> > > exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> > > enabled.
> > > 
> > > Hence this series aims to make sure all members are fully initialized,
> > > to avoid such bugs, and to prevent future breakage when converting
> > > drivers to a different method for specifying the parents.
> > > 
> > > Part One[1] fixed all cases that I identified to be real bugs, in
> > > response to a crash I saw on BeagleBone Black.
> > > 
> > > This series is the clock subpart of Part Two, which fixes remaining
> > > cases that are currently harmless.  These are still fragile, and may
> > > cause future breakage when converting drivers to a different method for
> > > specifying the parents.
> > > 
> > > Thanks for your comments!
> > 
> > I guess more a handling question, how do you expect this series to be
> > applied?
> > 
> > I.e. each clk-arch-maintainer, or in one big thing by the core clock
> > maintainers? Just wondering if I should pick the Rockchip patch
> > or just let the whole series get applied by the clock maintainers.
> 
> Before you pick up anything, let's see if Stephen picks up this series
> the next few days before he sends his pull to Linus.
> 
> Next development cycle, Jerome Brunet and I will be clk co-maintainers
> [1] and will start collecting patches then. If Stephen doesn't pick up
> this whole series this week, then pick up the patch(es) relevant for
> your tree and send Jerome and I pull as usual. That's just in case
> there's other patches that come in during the next development cycle to
> these files and to avoid merge conflicts. I don't have a strong opinion
> about this though, and could be convinced to take the whole series for
> simplicity.

Thanks for the heads up on the maintainer expansion :-) .

At least for me both work - Geert's fixes are for the clock types used
by the Rockchip clock drivers and generally we mostly get new clock trees,
so there shouldn't be any conflicts between this and other new stuff ;-) .


Heiko


> [1] https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/commit/?h=clk-next&id=8bc7ceadce1f362a8b0e88075ef3d926b286c01c
> 
> Brian
> 
>
Brian Masney Aug. 31, 2026, 3:35 p.m. UTC | #5 
Hi Geert / all,

On Fri, Aug 21, 2026 at 10:53:10AM +0200, Geert Uytterhoeven wrote:
> 	Hi all,
> 
> The clk_init_data structure contains several mutually-exclusive members
> for different methods to specify the possible parents of a clock,
> prompting drivers to initialize only the members they need.  However,
> not initializing all members may cause subtle issues, which are only
> exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> enabled.
> 
> Hence this series aims to make sure all members are fully initialized,
> to avoid such bugs, and to prevent future breakage when converting
> drivers to a different method for specifying the parents.
> 
> Part One[1] fixed all cases that I identified to be real bugs, in
> response to a crash I saw on BeagleBone Black.
> 
> This series is the clock subpart of Part Two, which fixes remaining
> cases that are currently harmless.  These are still fragile, and may
> cause future breakage when converting drivers to a different method for
> specifying the parents.
> 
> Thanks for your comments!
> 
> [1] "[PATCH treewide 0/5] clk: Make sure clk_init_data is fully
>      initialized (part 1)"
>     https://lore.kernel.org/cover.1787165329.git.geert+renesas@glider.be
> 
> Geert Uytterhoeven (45):
>   clk: aspeed: Make sure clk_init_data is fully initialized
>   clk: at91: Make sure clk_init_data is fully initialized
>   clk: bcm: iproc: Make sure clk_init_data is fully initialized
>   clk: berlin: Make sure clk_init_data is fully initialized
>   clk: cdce925: Make sure clk_init_data is fully initialized
>   clk: clk-axi-clkgen: Make sure clk_init_data is fully initialized
>   clk: cs2000-cp: Make sure clk_init_data is fully initialized
>   clk: davinci: Make sure clk_init_data is fully initialized
>   clk: fractional-divider: Make sure clk_init_data is fully initialized
>   clk: gemini: Make sure clk_init_data is fully initialized
>   clk: highbank: Make sure clk_init_data is fully initialized
>   clk: hisilicon: Make sure clk_init_data is fully initialized
>   clk: imx: Make sure clk_init_data is fully initialized
>   clk: ingenic: Make sure clk_init_data is fully initialized
>   clk: keystone: Make sure clk_init_data is fully initialized
>   clk: lmk04832: Make sure clk_init_data is fully initialized
>   clk: mediatek: Make sure clk_init_data is fully initialized
>   clk: milbeaut: Make sure clk_init_data is fully initialized
>   clk: mmp: Make sure clk_init_data is fully initialized
>   clk: mvebu: Make sure clk_init_data is fully initialized
>   clk: mxs: Make sure clk_init_data is fully initialized
>   clk: nomadik: Make sure clk_init_data is fully initialized
>   clk: npcm7xx: Make sure clk_init_data is fully initialized
>   clk: nxp: Make sure clk_init_data is fully initialized
>   clk: pistachio: Make sure clk_init_data is fully initialized
>   clk: pwm: Make sure clk_init_data is fully initialized
>   clk: renesas: Make sure clk_init_data is fully initialized
>   clk: rockchip: Make sure clk_init_data is fully initialized
>   clk: samsung: Make sure clk_init_data is fully initialized
>   clk: scpi: Make sure clk_init_data is fully initialized
>   clk: silabs: Make sure clk_init_data is fully initialized
>   clk: socfpga: Make sure clk_init_data is fully initialized
>   clk: spear: Make sure clk_init_data is fully initialized
>   clk: stm32: Make sure clk_init_data is fully initialized
>   clk: st: Make sure clk_init_data is fully initialized
>   clk: sunxi: Make sure clk_init_data is fully initialized
>   clk: tegra: Make sure clk_init_data is fully initialized
>   clk: uniphier: Make sure clk_init_data is fully initialized
>   clk: ux500: Make sure clk_init_data is fully initialized
>   clk: versatile: Make sure clk_init_data is fully initialized
>   clk: vt8500: Make sure clk_init_data is fully initialized
>   clk: x86: Make sure clk_init_data is fully initialized
>   clk: xgene: Make sure clk_init_data is fully initialized
>   clk: xilinx: Make sure clk_init_data is fully initialized
>   clk: zynqmp: Make sure clk_init_data is fully initialized

44 / 45 patches have been added to clk-next. I took it all for simplicity
rather than everyone trying to cherry pick just their parts.

Geert: The only patch that didn't apply was:

  [PATCH 27/45] clk: renesas: Make sure clk_init_data is fully initialized

I didn't look into it too much.

Brian
Geert Uytterhoeven Sept. 1, 2026, 7:14 a.m. UTC | #6 
Hi Brian,

On Mon, 31 Aug 2026 at 17:36, Brian Masney <bmasney@redhat.com> wrote:
> On Fri, Aug 21, 2026 at 10:53:10AM +0200, Geert Uytterhoeven wrote:
> > The clk_init_data structure contains several mutually-exclusive members
> > for different methods to specify the possible parents of a clock,
> > prompting drivers to initialize only the members they need.  However,
> > not initializing all members may cause subtle issues, which are only
> > exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is
> > enabled.
> >
> > Hence this series aims to make sure all members are fully initialized,
> > to avoid such bugs, and to prevent future breakage when converting
> > drivers to a different method for specifying the parents.
> >
> > Part One[1] fixed all cases that I identified to be real bugs, in
> > response to a crash I saw on BeagleBone Black.
> >
> > This series is the clock subpart of Part Two, which fixes remaining
> > cases that are currently harmless.  These are still fragile, and may
> > cause future breakage when converting drivers to a different method for
> > specifying the parents.

[...]

> 44 / 45 patches have been added to clk-next. I took it all for simplicity
> rather than everyone trying to cherry pick just their parts.

Thanks!

> Geert: The only patch that didn't apply was:
>
>   [PATCH 27/45] clk: renesas: Make sure clk_init_data is fully initialized
>
> I didn't look into it too much.

No worries, I have queued it in renesas-clk for v7.4.

Gr{oetje,eeting}s,

                        Geert