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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Hi, This series contains long due update to ARC atomics, discussed back in 2018 [1] and [2]. I had them for arc64 port and decided to post them here for some review and inclusion, after Mark's rework. Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [149.117.87.133 listed in wl.mailspike.net] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Hi, This series contains long due update to ARC atomics, discussed back in 2018 [1] and [2]. I had them for arc64 port and decided to post them here for some review and inclusion, after Mark's rework. The main changes are use of relaxed atomics and generic bitops. Latter does cause some cogen bloat on ARC due to signed args but that can be reviewd seperately consider cross-arch impact. The changes survive glibc testsuite with no regressions whatsoever. Please review and provide any feedback. Thx, -Vineet [1] https://lore.kernel.org/r/20180830144344.GW24142@hirez.programming.kicks-ass.net [2] https://lore.kernel.org/r/20180830135749.GA13005@arm.com Vineet Gupta (10): ARC: atomics: disintegrate header ARC: atomic: !LLSC: remove hack in atomic_set() for for UP ARC: atomic: !LLSC: use int data type consistently ARC: atomic64: LLSC: elide unused atomic_{and,or,xor,andnot}_return ARC: atomics: implement relaxed variants ARC: bitops: fls/ffs to take int (vs long) per asm-generic defines ARC: xchg: !LLSC: remove UP micro-optimization/hack ARC: cmpxchg/xchg: rewrite as macros to make type safe ARC: cmpxchg/xchg: implement relaxed variants (LLSC config only) ARC: atomic_cmpxchg/atomic_xchg: implement relaxed variants Will Deacon (1): ARC: switch to generic bitops arch/arc/include/asm/atomic-llsc.h | 97 ++++++ arch/arc/include/asm/atomic-spinlock.h | 102 ++++++ arch/arc/include/asm/atomic.h | 444 ++----------------------- arch/arc/include/asm/atomic64-arcv2.h | 250 ++++++++++++++ arch/arc/include/asm/bitops.h | 188 +---------- arch/arc/include/asm/cmpxchg.h | 233 ++++++------- arch/arc/include/asm/smp.h | 14 - arch/arc/kernel/smp.c | 2 - 8 files changed, 588 insertions(+), 742 deletions(-) create mode 100644 arch/arc/include/asm/atomic-llsc.h create mode 100644 arch/arc/include/asm/atomic-spinlock.h create mode 100644 arch/arc/include/asm/atomic64-arcv2.h Acked-by: Peter Zijlstra (Intel)