From patchwork Thu Sep 28 21:49:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hauke Mehrtens X-Patchwork-Id: 819766 X-Patchwork-Delegate: hauke@hauke-m.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=lede-dev-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Q9GsST9k"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y37gK0mcTz9t30 for ; Fri, 29 Sep 2017 07:51:21 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Subject:References: In-Reply-To:Message-Id:Date:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zGhmBwNwBrZSX8bu8RRXmjCIh+0iFjS1AL+u6BmG+EM=; b=Q9GsST9kXtnzCZ 1XAuIIGTmC4EvOkPD3q6VuKhyudTgCIXzRuCPLX7i/hfv0ZWQNcqIXdbC7FqJLKXRF7QHlHa40D6O nR5rGmQoOjMDhace9yQ/Y22XETKqvhE7KJAkXr+kyTf5EQygaL/sf5VZsla2oM591/XyV0wPaYQbL Rzx3xtWF4lEALGkAMKdWbMaeoWVDyB/317fW12aWEJecnhlQyCdkFiW+pef6rbS/UK5rORJihfhQP AaPW3rihUDLzNYMrbIWY2NDriMri3EUtYxPvMDxLN7pjf6GTCpFgCyzf53cNQj0poZ58YRFzkvCOf 6rWlWH+gw//phuWNEvkw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dxghj-0005m4-Lw; Thu, 28 Sep 2017 21:50:47 +0000 Received: from mx2.mailbox.org ([80.241.60.215]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dxghf-0005fG-00 for lede-dev@lists.infradead.org; Thu, 28 Sep 2017 21:50:45 +0000 Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx2.mailbox.org (Postfix) with ESMTPS id 350734C238; Thu, 28 Sep 2017 23:50:19 +0200 (CEST) X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter02.heinlein-hosting.de (spamfilter02.heinlein-hosting.de [80.241.56.116]) (amavisd-new, port 10030) with ESMTP id m-_d_URS25ib; Thu, 28 Sep 2017 23:50:17 +0200 (CEST) From: Hauke Mehrtens To: wigyori@uid0.hu, lede-dev@lists.infradead.org Date: Thu, 28 Sep 2017 23:49:45 +0200 Message-Id: <20170928214945.13510-3-hauke@hauke-m.de> In-Reply-To: <20170928214945.13510-1-hauke@hauke-m.de> References: <20170928214945.13510-1-hauke@hauke-m.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170928_145043_219014_EAF396B8 X-CRM114-Status: GOOD ( 15.31 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [80.241.60.215 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Subject: [LEDE-DEV] [PATCH 3/3] sunxi: H3: add device tree changes for H3 Ethernet X-BeenThere: lede-dev@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hauke Mehrtens MIME-Version: 1.0 Sender: "Lede-dev" Errors-To: lede-dev-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This adds the device tree changes needed to make the GMAC stmmac driver working for the Allwinner H3 SoCs. Signed-off-by: Hauke Mehrtens --- ...unxi-h3-h5-Add-dt-node-for-the-syscon-con.patch | 32 +++++++++++ ...unxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch | 67 ++++++++++++++++++++++ ...2-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch | 40 +++++++++++++ ...RM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch | 64 +++++++++++++++++++++ ...ts-sunxi-h3-h5-Correct-emac-register-size.patch | 26 +++++++++ 5 files changed, 229 insertions(+) create mode 100644 target/linux/sunxi/patches-4.9/0070-arm-sun8i-sunxi-h3-h5-Add-dt-node-for-the-syscon-con.patch create mode 100644 target/linux/sunxi/patches-4.9/0071-arm-sun8i-sunxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch create mode 100644 target/linux/sunxi/patches-4.9/0072-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch create mode 100644 target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch create mode 100644 target/linux/sunxi/patches-4.9/0074-ARM-dts-sunxi-h3-h5-Correct-emac-register-size.patch diff --git a/target/linux/sunxi/patches-4.9/0070-arm-sun8i-sunxi-h3-h5-Add-dt-node-for-the-syscon-con.patch b/target/linux/sunxi/patches-4.9/0070-arm-sun8i-sunxi-h3-h5-Add-dt-node-for-the-syscon-con.patch new file mode 100644 index 0000000000..88d431d319 --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0070-arm-sun8i-sunxi-h3-h5-Add-dt-node-for-the-syscon-con.patch @@ -0,0 +1,32 @@ +From d91d3daf5de90e0118227d8ddcb7bb4ff40c1b91 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Wed, 31 May 2017 09:18:37 +0200 +Subject: arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module + +This patch add the dt node for the syscon register present on the +Allwinner H3/H5 + +Only two register are present in this syscon and the only one useful is +the one dedicated to EMAC clock.. + +Signed-off-by: Corentin Labbe +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -140,6 +140,12 @@ + #size-cells = <1>; + ranges; + ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", ++ "syscon"; ++ reg = <0x01c00000 0x1000>; ++ }; ++ + dma: dma-controller@01c02000 { + compatible = "allwinner,sun8i-h3-dma"; + reg = <0x01c02000 0x1000>; diff --git a/target/linux/sunxi/patches-4.9/0071-arm-sun8i-sunxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch b/target/linux/sunxi/patches-4.9/0071-arm-sun8i-sunxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch new file mode 100644 index 0000000000..7054e3dc0f --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0071-arm-sun8i-sunxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch @@ -0,0 +1,67 @@ +From 0eba511a3cac29d6338b22b5b727f40cf8d163df Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Wed, 31 May 2017 09:18:38 +0200 +Subject: arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver + +The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 +speed. + +This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. +SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. + +Signed-off-by: Corentin Labbe +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -333,6 +333,14 @@ + interrupt-controller; + #interrupt-cells = <3>; + ++ emac_rgmii_pins: emac0 { ++ pins = "PD0", "PD1", "PD2", "PD3", "PD4", ++ "PD5", "PD7", "PD8", "PD9", "PD10", ++ "PD12", "PD13", "PD15", "PD16", "PD17"; ++ function = "emac"; ++ drive-strength = <40>; ++ }; ++ + i2c0_pins: i2c0 { + allwinner,pins = "PA11", "PA12"; + allwinner,function = "i2c0"; +@@ -431,6 +439,32 @@ + clocks = <&osc24M>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ }; ++ + wdt0: watchdog@01c20ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; diff --git a/target/linux/sunxi/patches-4.9/0072-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch b/target/linux/sunxi/patches-4.9/0072-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch new file mode 100644 index 0000000000..450d5bc2be --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0072-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch @@ -0,0 +1,40 @@ +From a9992f2dd1890112643a93d621ff5a4c97c55d53 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Wed, 31 May 2017 09:18:42 +0200 +Subject: arm: sun8i: orangepi-2: Enable dwmac-sun8i + +The dwmac-sun8i hardware is present on the Orange PI 2. +It uses the internal PHY. + +This patch create the needed emac node. + +Signed-off-by: Corentin Labbe +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -55,6 +55,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; + }; + +@@ -109,6 +110,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; diff --git a/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch b/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch new file mode 100644 index 0000000000..375d119d55 --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch @@ -0,0 +1,64 @@ +From 1dcd0095019aca7533eaeed9475d995a4eb30137 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Mon, 5 Jun 2017 21:21:26 +0200 +Subject: ARM: sun8i: orangepi-plus: Enable dwmac-sun8i + +The dwmac-sun8i hardware is present on the Orange PI plus. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,20 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -64,6 +78,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; diff --git a/target/linux/sunxi/patches-4.9/0074-ARM-dts-sunxi-h3-h5-Correct-emac-register-size.patch b/target/linux/sunxi/patches-4.9/0074-ARM-dts-sunxi-h3-h5-Correct-emac-register-size.patch new file mode 100644 index 0000000000..50877a5301 --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0074-ARM-dts-sunxi-h3-h5-Correct-emac-register-size.patch @@ -0,0 +1,26 @@ +From 072b6e3692532b6281bf781ded1c7a986ac17471 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Thu, 6 Jul 2017 10:53:34 +0200 +Subject: ARM: dts: sunxi: h3/h5: Correct emac register size + +The datasheet said that emac register size is 0x10000 not 0x104 + +Signed-off-by: Corentin Labbe +Signed-off-by: Maxime Ripard +[wens@csie.org: Fixed commit subject prefix] +Signed-off-by: Chen-Yu Tsai +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -442,7 +442,7 @@ + emac: ethernet@1c30000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; +- reg = <0x01c30000 0x104>; ++ reg = <0x01c30000 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + resets = <&ccu RST_BUS_EMAC>;