From patchwork Fri Mar 17 11:35:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Chiu X-Patchwork-Id: 1758245 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=DuYmEHWa; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256 header.s=google header.b=KAJhzfox; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PdMZf57qGz2470 for ; Fri, 17 Mar 2023 22:38:18 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ul4SaqFa8lgjr2PddJryne3Lg3S7HWrTcdUFhh33P1U=; b=DuYmEHWaG/S/so koiTdb6X9OIDv/VSEfYQIuCV7Pgv7Ik6knBK9wKMlzpwJ+6/oYqIWqjd5eHhTF3oNF8nvR802loJ3 Oz03v6dxf3HTRkbYNo8XnmxpSzaR6Ai3s7k9mkALrKc27iH5ZAJEVOiM7gJSXbRuGb3WP3IqCSK0m 98KlFBT2xnyzyrIdvBpmfwpLn+HMYcs4U92G7K8AWw5Z1xubaT3SkYFAYX15HkMJ4cEh9B6JCxte2 xtFPPw1Bdfs77llmmAxUZG7Jde/dmpFZR3I3y9wYVyVqEBlLQn5zMthM+mfFhDPJp6fsCcda2+PfG eyVTbTB6OLFEcyvxhWhQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pd8PX-0025x3-1M; Fri, 17 Mar 2023 11:38:15 +0000 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pd8PU-0025qg-1M for kvm-riscv@lists.infradead.org; Fri, 17 Mar 2023 11:38:14 +0000 Received: by mail-pj1-x102c.google.com with SMTP id x11so2865513pja.5 for ; Fri, 17 Mar 2023 04:38:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1679053087; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=7nse4H651gQWwjvfzxuALEV9PWCwDtW7Vpp5QzRUQkA=; b=KAJhzfoxouXhNmh0BnXcUeZzTs5NSiUJQMo1bTi4zg4ppXg2UPO0WxbHxP8DljsfXl d7ucZh+9Q7FJhsOArs9/u+ulxMpThUs/OvczGoUnzimq90pJX/YvQ7k5JCQfR1kNrOFq xzEhUVFRNgBZ6h2IN+NjHKnuBj0ApSNXYadrvVYeQLcqzMMILyaCjswPyFNpsnrD3gVB UUOQsxNVqGEr2f9TArWBY68ygO6Eic+F1OR6fVQCtJ1qdzzm9+YL0RDXN6sdwH16johl aAJ0qd3FolMzPuyNbO5iomX52JVZ2fLDRIm5zNtsUn7cPrBAIfIomd1OqvRmOFdlzpkL 4zKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679053087; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=7nse4H651gQWwjvfzxuALEV9PWCwDtW7Vpp5QzRUQkA=; b=Ov9Q8B3BvgK1bD+BO5VJZ9kQGQrvkh/8W3IJqtGPvgizGo+nBL3khP9Zn+/PyXNFIr Aqq6ON3sQx6VFKBB82BwEzm7HMiTIRYCym6aPgWspyNnx5HupbCg+X2Al89kTA8GiRT+ MpXQClnZynhBIe8nVcIAjR1wp8th3B2wR0qg/j3QjCE4DtG/YIT+wzJm/WedvEDjH7lb CVYV6HEm8SXgt0JVwSk+GnsKa7uKqeA4x0jrhqA+qGWmt680f12FdeNKg+0mT0qjEyRn wpIIBV7qRRMfkalnjCgTJsyBzE8pLy0pVzSEsWrODWUXsF5AqZEvsl2FhLKos8UBk6O1 7NcQ== X-Gm-Message-State: AO0yUKUj4syNmWsh4w2RRdkGbDdHdB/xpLcpWMW+HhNkPfh+tyrHcjtn KEiZULdZOLdG+M4FXjNf6thy53ZkTU/vEppsXgo= X-Google-Smtp-Source: AK7set9d9gXmb6m6eq9N88b1+NY1wOjkacSI7ZS9r8acOoqbX8Z+nye5qbASkA+KMYYjEtVhjDnjvg== X-Received: by 2002:a17:90b:388d:b0:23d:1948:6681 with SMTP id mu13-20020a17090b388d00b0023d19486681mr8142191pjb.39.1679053087270; Fri, 17 Mar 2023 04:38:07 -0700 (PDT) Received: from hsinchu25.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id n63-20020a17090a2cc500b0023d3845b02bsm1188740pjd.45.2023.03.17.04.38.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 04:38:06 -0700 (PDT) From: Andy Chiu To: linux-riscv@lists.infradead.org, palmer@dabbelt.com, anup@brainfault.org, atishp@atishpatra.org, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: vineetg@rivosinc.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, Andy Chiu , Paul Walmsley , Albert Ou , Nathan Chancellor , Nick Desaulniers , Tom Rix Subject: [PATCH -next v15 19/19] riscv: Enable Vector code to be built Date: Fri, 17 Mar 2023 11:35:38 +0000 Message-Id: <20230317113538.10878-20-andy.chiu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230317113538.10878-1-andy.chiu@sifive.com> References: <20230317113538.10878-1-andy.chiu@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230317_043812_455629_74447BF1 X-CRM114-Status: GOOD ( 11.36 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Guo Ren This patch adds a config which enables vector feature from the kernel space. Support for RISC_V_ISA_V is limited to GNU-assembler for now, as LLVM has not acquired the functionality to selectively change the arch option in assembly code. This is still under review at https://r [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:102c listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Guo Ren This patch adds a config which enables vector feature from the kernel space. Support for RISC_V_ISA_V is limited to GNU-assembler for now, as LLVM has not acquired the functionality to selectively change the arch option in assembly code. This is still under review at https://reviews.llvm.org/D123515 Signed-off-by: Guo Ren Co-developed-by: Greentime Hu Signed-off-by: Greentime Hu Suggested-by: Vineet Gupta Suggested-by: Atish Patra Co-developed-by: Andy Chiu Signed-off-by: Andy Chiu Reviewed-by: Conor Dooley --- arch/riscv/Kconfig | 20 ++++++++++++++++++++ arch/riscv/Makefile | 6 +++++- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c736dc8e2593..bf9aba2f2811 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -436,6 +436,26 @@ config RISCV_ISA_SVPBMT If you don't know what to do here, say Y. +config TOOLCHAIN_HAS_V + bool + default y + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv) + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv) + depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800 + depends on AS_IS_GNU + +config RISCV_ISA_V + bool "VECTOR extension support" + depends on TOOLCHAIN_HAS_V + depends on FPU + select DYNAMIC_SIGFRAME + default y + help + Say N here if you want to disable all vector related procedure + in the kernel. + + If you don't know what to do here, say Y. + config TOOLCHAIN_HAS_ZBB bool default y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 6203c3378922..84a50cfaedf9 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -56,6 +56,7 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c +riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v # Newer binutils versions default to ISA spec version 20191213 which moves some # instructions from the I extension to the Zicsr and Zifencei extensions. @@ -65,7 +66,10 @@ riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei # Check if the toolchain supports Zihintpause extension riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause -KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y)) +# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by +# keep non-v and multi-letter extensions out with the filter ([^v_]*) +KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/') + KBUILD_AFLAGS += -march=$(riscv-march-y) KBUILD_CFLAGS += -mno-save-restore