From patchwork Fri Mar 17 11:35:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Chiu X-Patchwork-Id: 1758227 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=BPnRbBnW; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256 header.s=google header.b=nuINMdZI; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PdMXd48Wbz2470 for ; Fri, 17 Mar 2023 22:36:33 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Dd9GR6/GFMMLeO8s6oJYIYkJXxHvMbfXaLhkNBAwZtk=; b=BPnRbBnWoQFGiO ZSVB8RlcQ0xJaP46tV8VylOtpPkHBQ0dn2aDPL152LkXw9G2qdkFRUs2lovFQiPU5u0Xs5vqmpzJ7 7E169c/lIvX0nHBwFywgPvjW0eFq7TJ1+Q7piiF1LWxAwYTPXsxwU/m+IWzyRq23AVt213BMqvw7T VWph7W4EhYAqbrbpqTewuusJmz4/yKlb92Og9GuuvVScZSwFI//KMpdT3Bil1KihBcH/YOT4svJ8l ykERBaPuUhM5t8n1WMXA8+MDfC4nMqgVzV9RUtvZ67WGlCfNAMdQi2b/lO2HqXBx1lmpgpBSVb/P2 VJB4u9uidm578GKGfNAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pd8Nq-0024rn-0U; Fri, 17 Mar 2023 11:36:30 +0000 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pd8Nm-0024oV-27 for kvm-riscv@lists.infradead.org; Fri, 17 Mar 2023 11:36:27 +0000 Received: by mail-pj1-x1034.google.com with SMTP id h12-20020a17090aea8c00b0023d1311fab3so4895616pjz.1 for ; Fri, 17 Mar 2023 04:36:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1679052982; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=xZD7AFVtobxh1FGjEKQD2QW8IDIT5bzbSx/S1GQl+8U=; b=nuINMdZIqeGnufeLAqBFc5m3Pm3eLy6GQeYLva8obPk7UOaAAoxapgFgyNTsAMiuhv q2J7aON1jaNVNNqnexC2481g5fm40FSOjPDrrQeU5+5yyj2FB1LrXPvdiVqbYO40eOJ2 5vEPeBhEhOrtC9WcbNcdh2XZDJtDJo/g92t0Xq9WfGZuREmf2wgD+9SQjqzOyaEqyzal vPeCSslysSMR3UGT+M9K0eDYW79d1ne54HglWjcggktosfAcWIIH4GENGL/NdJ5ZubgY /wH33J7b80yaf359Ui2R3MWatTp63ak0M2Df/Y3MMHz0rHtZgiU2m0Kvg6QJfpSdH9ln UhrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679052982; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xZD7AFVtobxh1FGjEKQD2QW8IDIT5bzbSx/S1GQl+8U=; b=f4rDBk0obIfdkBXWnOmmH9LQ+Q0spk1dNZ79JOs+69dRz/DAezBynfsC9/OKoqckGF fkv5kTCTX2Ndq/ayEWsvjAYLxA4GK1WOZIWdcOg2H+EM7nptSDop9e2RkDDWXG56gX3Q 8luuaHNt9wNMY2yBQzOmkjOW33TB4H87nlcAOjJNdOuY7+NGSXECsn5sJ/XmTSVjDlED jTbFFu226rWobw3T2aoIQyW5qkI6gisIHA9/Oyz7O5UKFpixiXiwbx0eVHBCAz/FogYa EiZ6IbRfBHlSwR8zDyxMWq0uYOF6+BOgDvz1Q5XM14jXMLYfpJOguUgPxDTH3VgierIW xnCw== X-Gm-Message-State: AO0yUKVxM0p+Hzybafa9QS3q9d7ehdhI/s/L/M0IygTXwieb0UTUOGil pFBTYhXyTqpnVh8sQy8gxZo7BA== X-Google-Smtp-Source: AK7set8YaJ+S5JO2EY47OaFzzWSX3SIXv/SMXhmlbmxhhblJd+uc6gZ2A2Il7sKzdv4mcpQLBOTUMw== X-Received: by 2002:a17:903:120a:b0:1a0:4f24:cae0 with SMTP id l10-20020a170903120a00b001a04f24cae0mr3325825plh.12.1679052982646; Fri, 17 Mar 2023 04:36:22 -0700 (PDT) Received: from hsinchu25.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id n63-20020a17090a2cc500b0023d3845b02bsm1188740pjd.45.2023.03.17.04.36.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 04:36:22 -0700 (PDT) From: Andy Chiu To: linux-riscv@lists.infradead.org, palmer@dabbelt.com, anup@brainfault.org, atishp@atishpatra.org, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: vineetg@rivosinc.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, Guo Ren , Andy Chiu , Paul Walmsley , Albert Ou , Guo Ren , Heiko Stuebner , Conor Dooley , Jisheng Zhang Subject: [PATCH -next v15 01/19] riscv: Rename __switch_to_aux() -> fpu Date: Fri, 17 Mar 2023 11:35:20 +0000 Message-Id: <20230317113538.10878-2-andy.chiu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230317113538.10878-1-andy.chiu@sifive.com> References: <20230317113538.10878-1-andy.chiu@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230317_043626_692623_AA3D50CA X-CRM114-Status: GOOD ( 10.07 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Guo Ren The name of __switch_to_aux() is not clear and rename it with the determine function: __switch_to_fpu(). Next we could add other regs' switch. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Signed-off-by: Greentime Hu Reviewed-by: Anup Patel Reviewe [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1034 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Guo Ren The name of __switch_to_aux() is not clear and rename it with the determine function: __switch_to_fpu(). Next we could add other regs' switch. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Signed-off-by: Greentime Hu Reviewed-by: Anup Patel Reviewed-by: Palmer Dabbelt Signed-off-by: Andy Chiu Tested-by: Heiko Stuebner Reviewed-by: Heiko Stuebner Reviewed-by: Conor Dooley --- arch/riscv/include/asm/switch_to.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 60f8ca01d36e..4b96b13dee27 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -46,7 +46,7 @@ static inline void fstate_restore(struct task_struct *task, } } -static inline void __switch_to_aux(struct task_struct *prev, +static inline void __switch_to_fpu(struct task_struct *prev, struct task_struct *next) { struct pt_regs *regs; @@ -66,7 +66,7 @@ static __always_inline bool has_fpu(void) static __always_inline bool has_fpu(void) { return false; } #define fstate_save(task, regs) do { } while (0) #define fstate_restore(task, regs) do { } while (0) -#define __switch_to_aux(__prev, __next) do { } while (0) +#define __switch_to_fpu(__prev, __next) do { } while (0) #endif extern struct task_struct *__switch_to(struct task_struct *, @@ -77,7 +77,7 @@ do { \ struct task_struct *__prev = (prev); \ struct task_struct *__next = (next); \ if (has_fpu()) \ - __switch_to_aux(__prev, __next); \ + __switch_to_fpu(__prev, __next); \ ((last) = __switch_to(__prev, __next)); \ } while (0)