mbox series

[v2,0/4] KVM: riscv: Fix Spectre-v1 vulnerabilities in register access

Message ID 20260303-kvm-riscv-spectre-v1-v2-0-192caab8e0dc@cispa.de
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Series KVM: riscv: Fix Spectre-v1 vulnerabilities in register access | expand

Message

Lukas Gerlach March 3, 2026, 2:19 p.m. UTC 
This series adds array_index_nospec() to RISC-V KVM to prevent
speculative out-of-bounds access to kernel memory.

Similar fixes exist for x86 (ioapic, lapic, PMU) and arm64 (vgic).

Signed-off-by: Lukas Gerlach <lukas.gerlach@cispa.de>
---
Changes in v2:
Add array_index_nospec() to four additional sites in vcpu_pmu.c
(Radim Krčmář)

---
Lukas Gerlach (4):
      KVM: riscv: Fix Spectre-v1 in ONE_REG register access
      KVM: riscv: Fix Spectre-v1 in AIA CSR access
      KVM: riscv: Fix Spectre-v1 in floating-point register access
      KVM: riscv: Fix Spectre-v1 in PMU counter access

 arch/riscv/kvm/aia.c         | 11 +++++++++--
 arch/riscv/kvm/vcpu_fp.c     | 17 +++++++++++++----
 arch/riscv/kvm/vcpu_onereg.c | 36 ++++++++++++++++++++++++++++--------
 arch/riscv/kvm/vcpu_pmu.c    | 14 +++++++++++---
 4 files changed, 61 insertions(+), 17 deletions(-)
---
base-commit: f4d0ec0aa20d49f09dc01d82894ce80d72de0560
change-id: 20260226-kvm-riscv-spectre-v1-4d04dc68c226

Best regards,

Comments

Anup Patel March 4, 2026, 11:08 a.m. UTC | #1 
On Tue, Mar 3, 2026 at 7:49 PM Lukas Gerlach <lukas.gerlach@cispa.de> wrote:
>
> This series adds array_index_nospec() to RISC-V KVM to prevent
> speculative out-of-bounds access to kernel memory.
>
> Similar fixes exist for x86 (ioapic, lapic, PMU) and arm64 (vgic).
>
> Signed-off-by: Lukas Gerlach <lukas.gerlach@cispa.de>
> ---
> Changes in v2:
> Add array_index_nospec() to four additional sites in vcpu_pmu.c
> (Radim Krčmář)
>
> ---
> Lukas Gerlach (4):
>       KVM: riscv: Fix Spectre-v1 in ONE_REG register access
>       KVM: riscv: Fix Spectre-v1 in AIA CSR access
>       KVM: riscv: Fix Spectre-v1 in floating-point register access
>       KVM: riscv: Fix Spectre-v1 in PMU counter access
>
>  arch/riscv/kvm/aia.c         | 11 +++++++++--
>  arch/riscv/kvm/vcpu_fp.c     | 17 +++++++++++++----
>  arch/riscv/kvm/vcpu_onereg.c | 36 ++++++++++++++++++++++++++++--------
>  arch/riscv/kvm/vcpu_pmu.c    | 14 +++++++++++---
>  4 files changed, 61 insertions(+), 17 deletions(-)

Queued these patches as fixes for Linux-7.0-rcX

Thanks,
Anup
patchwork-bot+linux-riscv@kernel.org March 24, 2026, 6:07 a.m. UTC | #2 
Hello:

This series was applied to riscv/linux.git (for-next)
by Anup Patel <anup@brainfault.org>:

On Tue, 3 Mar 2026 15:19:40 +0100 you wrote:
> This series adds array_index_nospec() to RISC-V KVM to prevent
> speculative out-of-bounds access to kernel memory.
> 
> Similar fixes exist for x86 (ioapic, lapic, PMU) and arm64 (vgic).
> 
> Signed-off-by: Lukas Gerlach <lukas.gerlach@cispa.de>
> 
> [...]

Here is the summary with links:
  - [v2,1/4] KVM: riscv: Fix Spectre-v1 in ONE_REG register access
    https://git.kernel.org/riscv/c/f9e26fc32541
  - [v2,2/4] KVM: riscv: Fix Spectre-v1 in AIA CSR access
    https://git.kernel.org/riscv/c/ec87a82ca874
  - [v2,3/4] KVM: riscv: Fix Spectre-v1 in floating-point register access
    https://git.kernel.org/riscv/c/8f0c15c4b14f
  - [v2,4/4] KVM: riscv: Fix Spectre-v1 in PMU counter access
    https://git.kernel.org/riscv/c/2dda6a9e09ee

You are awesome, thank you!