From patchwork Thu Jun 21 11:39:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 166297 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8367EB6EF3 for ; Thu, 21 Jun 2012 21:39:19 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759351Ab2FULjS (ORCPT ); Thu, 21 Jun 2012 07:39:18 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:43166 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759349Ab2FULjR (ORCPT ); Thu, 21 Jun 2012 07:39:17 -0400 Received: by pbbrp8 with SMTP id rp8so1978869pbb.19 for ; Thu, 21 Jun 2012 04:39:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding :x-gm-message-state; bh=h8bvOUnIOdvHsr1bcGKwCG1r9QSpu8yJfeXdvhrogPs=; b=kzMVFDLSaw+87TmlsnmLWp0ycRRJiPdULLYbTNvYfA4kIahzFk6q4R2OpZzg6s5NXE IJDMzxi32dEgn3ugRwcwCJPdOyfl/Z5TdC3A2cc5LgmVkMUipUPjLUbs/d3lLkVGLnEe fsAP4h/QBSkYBJtn3+KT1gQjoHXIhdnRKZxLnloHGqXYVX8ZCtnbdCKRRVsEfD0JpBPz afJpROeGzBa4iJKFGqy52PmGo12ZyHQP0fSpZ5oneK6GYhrDog6TvfZodIa1oIj++OAN obtHvmD2Sx2GUrXzCVKRhjEp0EuD9ZVj8WCXD+yGAWqC6wJJtY5T9upuKyetJkwfTHNo WYNw== Received: by 10.68.195.167 with SMTP id if7mr10419727pbc.16.1340278754608; Thu, 21 Jun 2012 04:39:14 -0700 (PDT) Received: from [192.168.1.18] (60-242-102-4.tpgi.com.au. [60.242.102.4]) by mx.google.com with ESMTPS id mt9sm35458964pbb.14.2012.06.21.04.39.11 (version=SSLv3 cipher=OTHER); Thu, 21 Jun 2012 04:39:14 -0700 (PDT) Message-ID: <4FE307DE.5070002@ozlabs.ru> Date: Thu, 21 Jun 2012 21:39:10 +1000 From: Alexey Kardashevskiy User-Agent: Mozilla/5.0 (X11; Linux i686; rv:12.0) Gecko/20120428 Thunderbird/12.0.1 MIME-Version: 1.0 To: Jan Kiszka CC: Alex Williamson , "qemu-devel@nongnu.org" , "kvm-ppc@vger.kernel.org" Subject: [PATCH] msi/msix: added API to set MSI message address and data References: <4FD968BB.2000505@ozlabs.ru> <4FD9693E.2090508@ozlabs.ru> <1339649800.24818.3.camel@ul30vt> <4FD973F7.7080207@ozlabs.ru> <4FD97A94.2080709@siemens.com> <4FE2C33E.1080808@ozlabs.ru> <4FE2C4DA.40403@siemens.com> <4FE2CABB.4070203@ozlabs.ru> <4FE2CFC8.509@siemens.com> <4FE2F756.8020509@ozlabs.ru> <4FE2F9AF.2050006@siemens.com> <4FE2FC5D.8040503@ozlabs.ru> <4FE2FDE1.1090401@siemens.com> In-Reply-To: <4FE2FDE1.1090401@siemens.com> X-Gm-Message-State: ALoCoQljtvgwdiE1Lv5dzf+ctDwC+0g6q14pnAEaGnPp+eNCeaZupULIEMZy2W1YJ30jxfJVu/6y Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org Added (msi|msix)_set_message() functions. Currently msi_notify()/msix_notify() write to these vectors to signal the guest about an interrupt so the correct values have to written there by the guest or QEMU. For example, POWER guest never initializes MSI/MSIX vectors, instead it uses RTAS hypercalls. So in order to support MSIX for virtio-pci on POWER we have to initialize MSI/MSIX message from QEMU. Signed-off-by: Alexey Kardashevskiy --- hw/msi.c | 13 +++++++++++++ hw/msi.h | 1 + hw/msix.c | 9 +++++++++ hw/msix.h | 2 ++ 4 files changed, 25 insertions(+) diff --git a/hw/msi.c b/hw/msi.c index 5233204..cc6102f 100644 --- a/hw/msi.c +++ b/hw/msi.c @@ -105,6 +105,19 @@ static inline uint8_t msi_pending_off(const PCIDevice* dev, bool msi64bit) return dev->msi_cap + (msi64bit ? PCI_MSI_PENDING_64 : PCI_MSI_PENDING_32); } +void msi_set_message(PCIDevice *dev, MSIMessage msg) +{ + uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); + bool msi64bit = flags & PCI_MSI_FLAGS_64BIT; + + if (msi64bit) { + pci_set_quad(dev->config + msi_address_lo_off(dev), msg.address); + } else { + pci_set_long(dev->config + msi_address_lo_off(dev), msg.address); + } + pci_set_word(dev->config + msi_data_off(dev, msi64bit), msg.data); +} + bool msi_enabled(const PCIDevice *dev) { return msi_present(dev) && diff --git a/hw/msi.h b/hw/msi.h index 75747ab..6ec1f99 100644 --- a/hw/msi.h +++ b/hw/msi.h @@ -31,6 +31,7 @@ struct MSIMessage { extern bool msi_supported; +void msi_set_message(PCIDevice *dev, MSIMessage msg); bool msi_enabled(const PCIDevice *dev); int msi_init(struct PCIDevice *dev, uint8_t offset, unsigned int nr_vectors, bool msi64bit, bool msi_per_vector_mask); diff --git a/hw/msix.c b/hw/msix.c index ded3c55..5f7d6d3 100644 --- a/hw/msix.c +++ b/hw/msix.c @@ -45,6 +45,15 @@ static MSIMessage msix_get_message(PCIDevice *dev, unsigned vector) return msg; } +void msix_set_message(PCIDevice *dev, int vector, struct MSIMessage msg) +{ + uint8_t *table_entry = dev->msix_table_page + vector * PCI_MSIX_ENTRY_SIZE; + + pci_set_quad(table_entry + PCI_MSIX_ENTRY_LOWER_ADDR, msg.address); + pci_set_long(table_entry + PCI_MSIX_ENTRY_DATA, msg.data); + table_entry[PCI_MSIX_ENTRY_VECTOR_CTRL] &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; +} + /* Add MSI-X capability to the config space for the device. */ /* Given a bar and its size, add MSI-X table on top of it * and fill MSI-X capability in the config space. diff --git a/hw/msix.h b/hw/msix.h index 50aee82..26a437e 100644 --- a/hw/msix.h +++ b/hw/msix.h @@ -4,6 +4,8 @@ #include "qemu-common.h" #include "pci.h" +void msix_set_message(PCIDevice *dev, int vector, MSIMessage msg); + int msix_init(PCIDevice *pdev, unsigned short nentries, MemoryRegion *bar, unsigned bar_nr, unsigned bar_size);