Message ID | 20200426020518.GC5853@oc0525413822.ibm.com |
---|---|
State | Superseded |
Headers | show |
Series | [v3] powerpc/XIVE: SVM: share the event-queue page with the Hypervisor. | expand |
On Sat, 25 Apr 2020 19:05:18 -0700, Ram Pai wrote: > >From 10ea2eaf492ca3f22f67a5a63a2b7865e45299ad Mon Sep 17 00:00:00 2001 > From: Ram Pai <linuxram@us.ibm.com> > Date: Mon, 24 Feb 2020 01:09:48 -0500 > Subject: [PATCH v3] powerpc/XIVE: SVM: share the event-queue page with the > Hypervisor. > > XIVE interrupt controller uses an Event Queue (EQ) to enqueue event > notifications when an exception occurs. The EQ is a single memory page > provided by the O/S defining a circular buffer, one per server and > priority couple. > > [...] Applied to powerpc/next. [1/1] powerpc/xive: Share the event-queue page with the Hypervisor. https://git.kernel.org/powerpc/c/094235222d41d68d35de18170058d94a96a82628 cheers
diff --git a/arch/powerpc/sysdev/xive/spapr.c b/arch/powerpc/sysdev/xive/spapr.c index 55dc61c..608b52f 100644 --- a/arch/powerpc/sysdev/xive/spapr.c +++ b/arch/powerpc/sysdev/xive/spapr.c @@ -26,6 +26,8 @@ #include <asm/xive.h> #include <asm/xive-regs.h> #include <asm/hvcall.h> +#include <asm/svm.h> +#include <asm/ultravisor.h> #include "xive-internal.h" @@ -501,6 +503,9 @@ static int xive_spapr_configure_queue(u32 target, struct xive_q *q, u8 prio, rc = -EIO; } else { q->qpage = qpage; + if (is_secure_guest()) + uv_share_page(PHYS_PFN(qpage_phys), + 1 << xive_alloc_order(order)); } fail: return rc; @@ -534,6 +539,8 @@ static void xive_spapr_cleanup_queue(unsigned int cpu, struct xive_cpu *xc, hw_cpu, prio); alloc_order = xive_alloc_order(xive_queue_shift); + if (is_secure_guest()) + uv_unshare_page(PHYS_PFN(__pa(q->qpage)), 1 << alloc_order); free_pages((unsigned long)q->qpage, alloc_order); q->qpage = NULL; }