@@ -678,6 +678,7 @@ struct kvm_ppc_cpu_char {
#define KVM_DEV_XIVE_GRP_CTRL 2
#define KVM_DEV_XIVE_GET_ESB_FD 1
#define KVM_DEV_XIVE_GET_TIMA_FD 2
+#define KVM_DEV_XIVE_VC_BASE 3
/* Layout of 64-bit XIVE source attribute values */
#define KVM_XIVE_LEVEL_SENSITIVE (1ULL << 0)
@@ -125,6 +125,9 @@ struct kvmppc_xive {
/* Flags */
u8 single_escalation;
+
+ /* VC base address for ESBs */
+ u64 vc_base;
};
#define KVMPPC_XIVE_Q_COUNT 8
@@ -249,6 +249,25 @@ static int kvmppc_xive_native_set_source(struct kvmppc_xive *xive, long irq,
return 0;
}
+static int kvmppc_xive_native_set_vc_base(struct kvmppc_xive *xive, u64 addr)
+{
+ u64 __user *ubufp = (u64 __user *) addr;
+
+ if (get_user(xive->vc_base, ubufp))
+ return -EFAULT;
+ return 0;
+}
+
+static int kvmppc_xive_native_get_vc_base(struct kvmppc_xive *xive, u64 addr)
+{
+ u64 __user *ubufp = (u64 __user *) addr;
+
+ if (put_user(xive->vc_base, ubufp))
+ return -EFAULT;
+
+ return 0;
+}
+
static int xive_native_esb_fault(struct vm_fault *vmf)
{
struct vm_area_struct *vma = vmf->vma;
@@ -376,6 +395,12 @@ static int kvmppc_xive_native_set_attr(struct kvm_device *dev,
case KVM_DEV_XIVE_GRP_SOURCES:
return kvmppc_xive_native_set_source(xive, attr->attr,
attr->addr);
+ case KVM_DEV_XIVE_GRP_CTRL:
+ switch (attr->attr) {
+ case KVM_DEV_XIVE_VC_BASE:
+ return kvmppc_xive_native_set_vc_base(xive, attr->addr);
+ }
+ break;
}
return -ENXIO;
}
@@ -392,6 +417,8 @@ static int kvmppc_xive_native_get_attr(struct kvm_device *dev,
return kvmppc_xive_native_get_esb_fd(xive, attr->addr);
case KVM_DEV_XIVE_GET_TIMA_FD:
return kvmppc_xive_native_get_tima_fd(xive, attr->addr);
+ case KVM_DEV_XIVE_VC_BASE:
+ return kvmppc_xive_native_get_vc_base(xive, attr->addr);
}
break;
}
@@ -411,6 +438,7 @@ static int kvmppc_xive_native_has_attr(struct kvm_device *dev,
switch (attr->attr) {
case KVM_DEV_XIVE_GET_ESB_FD:
case KVM_DEV_XIVE_GET_TIMA_FD:
+ case KVM_DEV_XIVE_VC_BASE:
return 0;
}
break;
@@ -446,6 +474,11 @@ static void kvmppc_xive_native_free(struct kvm_device *dev)
kfree(dev);
}
+/*
+ * ESB MMIO address of chip 0
+ */
+#define XIVE_VC_BASE 0x0006010000000000ull
+
static int kvmppc_xive_native_create(struct kvm_device *dev, u32 type)
{
struct kvmppc_xive *xive;
@@ -480,6 +513,8 @@ static int kvmppc_xive_native_create(struct kvm_device *dev, u32 type)
if (xive->vp_base == XIVE_INVALID_VP)
ret = -ENOMEM;
+ xive->vc_base = XIVE_VC_BASE;
+
xive->single_escalation = xive_native_has_single_escalation();
if (ret)
The ESB MMIO region controls the interrupt sources of the guest. QEMU will query an fd (GET_ESB_FD ioctl) and map this region at a specific address for the guest to use and the guest will obtain this information using the H_INT_GET_SOURCE_INFO hcall. To inform KVM of the address setting used by QEMU, let's add a VC_BASE control to the KVM XIVE device Signed-off-by: Cédric Le Goater <clg@kaod.org> --- arch/powerpc/include/uapi/asm/kvm.h | 1 + arch/powerpc/kvm/book3s_xive.h | 3 +++ arch/powerpc/kvm/book3s_xive_native.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+)