From patchwork Thu Jan 11 10:11:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guo X-Patchwork-Id: 858986 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=kvm-ppc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mjkgzvyb"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zHMBR46Qqz9t50 for ; Thu, 11 Jan 2018 21:12:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933227AbeAKKMb (ORCPT ); Thu, 11 Jan 2018 05:12:31 -0500 Received: from mail-pf0-f195.google.com ([209.85.192.195]:42281 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932982AbeAKKMa (ORCPT ); Thu, 11 Jan 2018 05:12:30 -0500 Received: by mail-pf0-f195.google.com with SMTP id d23so1311175pfe.9; Thu, 11 Jan 2018 02:12:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VII/ozmMKZUIeV+gwPQyvE/UN00EyCVC3v9unNc3jXc=; b=mjkgzvybCZG79f3Nmz/hRvTpZGDJLMQtyKv+MOlpktymT+yOSJL34EI5awERMdEXZW DOkKIUf2tdSiX5vy0tubdJOI8CO4kEbUOjG6CV+bRUBqnV9gNsYs214YQdoHvRyI8wxm n7kmqTomFvSU/y27m/QsmtRe5opLHD4F1HTeF0ZAlCeLurubUA+hweLKQqa80XNIl32a WTHSurU6cTHsobnR1dFXDh0qrZ1UMnuFYX7QU5UxfwPUHh/6bHNjHq/O1+ioyTT9XDJX JktuTtvZWQa30VcsQnDFsAfSomMs8tZBcqf7MZWc0GkrQYH3KdWhWGgeUp4sgCyx8Dd/ d5/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VII/ozmMKZUIeV+gwPQyvE/UN00EyCVC3v9unNc3jXc=; b=s+Z3876WOOAbODR9+eo0xVTDgCG4FvS6JwIh8ymY4AI3AV7+f2n8m97/SvR39XAPNm D2bqY+aYF4D3EowaCG7AVBn/7G1db8xbXIKXLc6/ZKu9WJ+5njiT16O13w0grSWPCTrr o2amdumMCH6hAwhpCBkzjkkqavdYFwpzerB5zoflKZlJsHYV7VkDf0focvbulIroGDF/ lIMOj8bAZp87P8sORUI9gGBCev+EznsHA6d6dOJQKC9YAz7s13fd9eB460DRzzIuJCK3 13QoRHx/EN+E/Nzb3RhcwoMJVacN33Lbe0m3OHlupMkD8UcvWq3kEPpi4SC/5G1SWK2F cerw== X-Gm-Message-State: AKwxytebf2q5fMx5cZcuFgG+Nb0N2j3wAuEcvScW4LqYA8aBb3AoY6cK x4z1Khci6ugBvROBbaztqWc/Ew== X-Google-Smtp-Source: ACJfBotdx4XOv3XocSpuc4vWCJYQoYy4ateiIISwC5arBUay856nuD4+/aZtlH5NBiLK4xv5Tan+Yg== X-Received: by 10.84.143.131 with SMTP id 3mr2015006plz.385.1515665549608; Thu, 11 Jan 2018 02:12:29 -0800 (PST) Received: from simonLocalRHEL7.cn.ibm.com ([112.73.0.88]) by smtp.gmail.com with ESMTPSA id m11sm34336122pgt.56.2018.01.11.02.12.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 02:12:29 -0800 (PST) From: wei.guo.simon@gmail.com To: linuxppc-dev@lists.ozlabs.org Cc: Paul Mackerras , kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, Simon Guo Subject: [PATCH 11/26] KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr() Date: Thu, 11 Jan 2018 18:11:24 +0800 Message-Id: <1515665499-31710-12-git-send-email-wei.guo.simon@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1515665499-31710-1-git-send-email-wei.guo.simon@gmail.com> References: <1515665499-31710-1-git-send-email-wei.guo.simon@gmail.com> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org From: Simon Guo PR KVM host usually equipped with enabled TM in its host MSR value, and with non-transactional TS value. When a guest with TM active traps into PR KVM host, the rfid at the tail of kvmppc_interrupt_pr() will try to switch TS bits from S0 (Suspended & TM disabled) to N1 (Non-transactional & TM enabled). That will leads to TM Bad Thing interrupt. This patch manually sets target TS bits unchanged to avoid this exception. Signed-off-by: Simon Guo Reviewed-by: Paul Mackerras --- arch/powerpc/kvm/book3s_segment.S | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S index 2a2b96d..675e9a2 100644 --- a/arch/powerpc/kvm/book3s_segment.S +++ b/arch/powerpc/kvm/book3s_segment.S @@ -383,6 +383,19 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) */ PPC_LL r6, HSTATE_HOST_MSR(r13) +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + /* + * We don't want to change MSR[TS] bits via rfi here. + * The actual TM handling logic will be in host with + * recovered DR/IR bits after HSTATE_VMHANDLER. + * And MSR_TM can be enabled in HOST_MSR so rfid may + * not suppress this change and can lead to exception. + * Manually set MSR to prevent TS state change here. + */ + mfmsr r7 + rldicl r7, r7, 64 - MSR_TS_S_LG, 62 + rldimi r6, r7, MSR_TS_S_LG, 63 - MSR_TS_T_LG +#endif PPC_LL r8, HSTATE_VMHANDLER(r13) #ifdef CONFIG_PPC64