| Message ID | BA60E6BA-8852-4D31-856B-434449463644@vectranetworks.com |
|---|---|
| State | Changes Requested |
| Headers | show
Return-Path: <intel-wired-lan-bounces@lists.osuosl.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3syVjT1B5Lz9sD6 for <incoming@patchwork.ozlabs.org>; Tue, 18 Oct 2016 07:51:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=VectraNetworks.onmicrosoft.com header.i=@VectraNetworks.onmicrosoft.com header.b=d2EjCilR; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by fraxinus.osuosl.org (Postfix) with ESMTP id 6B03CC10EB; Mon, 17 Oct 2016 20:51:07 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from fraxinus.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PKcbwez4xRUy; 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Mon, 17 Oct 2016 18:51:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=VectraNetworks.onmicrosoft.com; s=selector1-vectranetworks-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=EnNqTXe/luWQs4OmPnywsKcAfFaLW75IWROkPnwk6zA=; b=d2EjCilRc/Vhiqjkq4OgzQbPw1M1IUoEejjeaU/sL1sYgMYOjKn1JH800jt8E31Ie5LRc8TKdylFCDfJ6/VFkMNv98wKHz0JsfvvdbRQLdwgFTXglpddHMMJBEMgyShdadgTXy1E2UZqVbxEX6QVDAicfg16s90Y53QV4b0VQ40= Received: from CO2PR0801MB647.namprd08.prod.outlook.com (10.141.246.154) by CO2PR0801MB646.namprd08.prod.outlook.com (10.141.246.153) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.659.11; Mon, 17 Oct 2016 18:36:39 +0000 Received: from CO2PR0801MB647.namprd08.prod.outlook.com ([10.141.246.154]) by CO2PR0801MB647.namprd08.prod.outlook.com ([10.141.246.154]) with mapi id 15.01.0659.025; Mon, 17 Oct 2016 18:36:39 +0000 From: Chris Arges <carges@vectranetworks.com> To: Jochen Henneberg <jh@henneberg-systemdesign.com> Thread-Topic: [Intel-wired-lan] Bug with 'igb: Remove GS40G specific defines/functions' Thread-Index: AQHSJMIN/aUiNqYSHk+xKoSLRucIp1fRAmiXneZozICY49tUROccMtUAgAEXUYD///+QgIABu6WAgATb5YA= Date: Mon, 17 Oct 2016 18:36:38 +0000 Message-ID: <BA60E6BA-8852-4D31-856B-434449463644@vectranetworks.com> References: <77C85CBC-39FD-40B4-9456-56A3FEE3544A@vectranetworks.com> <1570773976.567827.1476303559656.JavaMail.zimbra@xes-inc.com> <20F028E5-EC20-4F65-8889-3F254196ABF8@vectranetworks.com> <133564642.602581.1476305193640.JavaMail.zimbra@xes-inc.com> <F267652D-6FE2-4808-BFE7-013510C5A733@vectranetworks.com> <1476349095.18484.15.camel@maxwell> <1749CC13-EEFE-4EEB-B74E-40B563D7230C@vectranetworks.com> <1476444273.23813.23.camel@maxwell> In-Reply-To: <1476444273.23813.23.camel@maxwell> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=carges@vectranetworks.com; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-wired-lan-bounces@lists.osuosl.org Sender: "Intel-wired-lan" <intel-wired-lan-bounces@lists.osuosl.org> |
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c index 5b54254..6d42dfe 100644 --- a/drivers/net/ethernet/intel/igb/e1000_phy.c +++ b/drivers/net/ethernet/intel/igb/e1000_phy.c @@ -77,6 +77,10 @@ s32 igb_get_phy_id(struct e1000_hw *hw) s32 ret_val = 0; u16 phy_id; + /* ensure phy page selection to fix misconfigured i210 */ + if (hw->mac.type == e1000_i210) + phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); + ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); if (ret_val) goto out;
On 10/14/16, 6:24 AM, "Jochen Henneberg" <jh@henneberg-systemdesign.com> wrote: On Do, 2016-10-13 at 13:56 +0000, Chris Arges wrote: > Jochen, > > Thanks for this update. I tested this patch and it fixes my issue! > If there are no other ill effects from this patch perhaps it would be > a good > candidate for mainline and stable. The patch is hacky, it does neither use the phy-ops.write_reg() nor does it check for the correct chip before it applies the write. I will try to prepare a clean fix and send a patch. Regards -Jochen What about something as follows? This fixes the issue for me. > > --chris -- Henneberg - Systemdesign Jochen Henneberg Loehnfeld 26 21423 Winsen (Luhe) -- Fon: +49 4174 668 773 Mobile: +49 172 160 14 69 Fax: +49 321 210 761 64 www: www.henneberg-systemdesign.com