| Message ID | 20260925-jk-e825c-timestamp-processing-logic-fixes-srcu-v3-7-6532598e8da8@intel.com |
|---|---|
| State | Under Review |
| Delegated to: | Anthony Nguyen |
| Headers | show |
| Series | ice: E82x: timestamp processing logic fixes | expand |
> -----Original Message----- > From: Jacob Keller <jacob.e.keller@intel.com> > Sent: Friday, September 25, 2026 4:57 PM > To: Intel Wired LAN <intel-wired-lan@lists.osuosl.org>; Machnikowski, Maciej <maciej.machnikowski@intel.com>; Keller, Jacob E <jacob.e.keller@intel.com>; Korba, Przemyslaw <przemyslaw.korba@intel.com>; Nguyen, Anthony L <anthony.l.nguyen@intel.com>; Nitka, Grzegorz <grzegorz.nitka@intel.com>; Kubalewski, Arkadiusz <arkadiusz.kubalewski@intel.com> > Cc: Keller, Jacob E <jacob.e.keller@intel.com>; Loktionov, Aleksandr <aleksandr.loktionov@intel.com>; Kubalewski, Arkadiusz <arkadiusz.kubalewski@intel.com>; Korba, Przemyslaw <przemyslaw.korba@intel.com>; Machnikowski, Maciej <maciej.machnikowski@intel.com> > Subject: [PATCH iwl-net v3 07/15] ice: E822: cancel offset verification work during reset preparation > > From: Karol Kolacinski <karol.kolacinski@intel.com> > > The offset verification work task for E822 is executed after a PHY restart to complete vernier calibration. In the event that either Tx or Rx calibration hasn't finished, it may still be executing when a reset occurs. > > A single PF reset does not trigger a PHY restart, but larger resets (CORE, GLOBAL, EMP) will initiate a PHY restart. > > The ice_ptp_wait_for_offsets() function does check if the driver is resetting, and will reschedule itself. However, it is possible that a given execution is already past this check. The function may then fail to access the sideband queue. It treats failures as a reason to re-schedule and check again later. This re-schedule will then see the updated reset state via > ice_is_reset_in_progress() and will keep re-scheduling until the reset finishes. > > The larger resets will restart the PHY, canceling any outstanding vernier calibration and forcing a restart. Preemptively cancel the task for non-PF resets to avoid doing unnecessary checks while resetting. The task is not canceled for a PF reset, otherwise nothing would restart the task to finish vernier calibration after the reset. > > Fixes: 95af1f1c4c9f ("ice: reschedule ice_ptp_wait_for_offset_valid during reset") > Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> > Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> > Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> > Signed-off-by: Przemyslaw Korba <przemyslaw.korba@intel.com> > Reviewed-by: Maciek Machnikowski <maciej.machnikowski@intel.com> > Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> > --- > drivers/net/ethernet/intel/ice/ice_ptp.c | 3 +++ > 1 file changed, 3 insertions(+) Tested-by: Alexander Nowlin <alexander.nowlin@intel.com>
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 7f82439c47ee..7cc151b01a13 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -3006,6 +3006,9 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) if (reset_type == ICE_RESET_PFR) return; + if (hw->mac_type == ICE_MAC_GENERIC) + kthread_cancel_delayed_work_sync(&ptp->port.ov_work); + if (ice_pf_src_tmr_owned(pf) && hw->mac_type == ICE_MAC_GENERIC_3K_E825) ice_ptp_prepare_rebuild_sec(pf, false, reset_type);