diff mbox series

[iwl-next,v1,2/8] igc: add TXDCTL prefix to related macros

Message ID 20250428060225.1306986-3-faizal.abdul.rahim@linux.intel.com
State Changes Requested
Headers show
Series igc: harmonize queue priority and add preemptible queue support | expand

Commit Message

Abdul Rahim, Faizal April 28, 2025, 6:02 a.m. UTC
Rename macros to include the TXDCTL_ prefix for consistency and clarity.
This aligns naming with the register they configure and improves code
readability.

Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
---
 drivers/net/ethernet/intel/igc/igc.h      | 6 +++---
 drivers/net/ethernet/intel/igc/igc_main.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Ruinskiy, Dima April 28, 2025, 6:57 a.m. UTC | #1
On 28/04/2025 9:02, Faizal Rahim wrote:
> Rename macros to include the TXDCTL_ prefix for consistency and clarity.
> This aligns naming with the register they configure and improves code
> readability.
> 
> Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
> ---
>   drivers/net/ethernet/intel/igc/igc.h      | 6 +++---
>   drivers/net/ethernet/intel/igc/igc_main.c | 6 +++---
>   2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h
> index e9d180eac015..bc37cc8deefb 100644
> --- a/drivers/net/ethernet/intel/igc/igc.h
> +++ b/drivers/net/ethernet/intel/igc/igc.h
> @@ -487,10 +487,10 @@ static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)
>    */
>   #define IGC_RX_PTHRESH			8
>   #define IGC_RX_HTHRESH			8
> -#define IGC_TX_PTHRESH			8
> -#define IGC_TX_HTHRESH			1
> +#define IGC_TXDCTL_PTHRESH		8
> +#define IGC_TXDCTL_HTHRESH		1
>   #define IGC_RX_WTHRESH			4
> -#define IGC_TX_WTHRESH			16
> +#define IGC_TXDCTL_WTHRESH		16
>   
>   /* Additional Transmit Descriptor Control definitions */
>   /* Ena specific Tx Queue */
> diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c
> index 27575a1e1777..725c8f0b9f3d 100644
> --- a/drivers/net/ethernet/intel/igc/igc_main.c
> +++ b/drivers/net/ethernet/intel/igc/igc_main.c
> @@ -749,9 +749,9 @@ static void igc_configure_tx_ring(struct igc_adapter *adapter,
>   	wr32(IGC_TDH(reg_idx), 0);
>   	writel(0, ring->tail);
>   
> -	txdctl |= IGC_TX_PTHRESH;
> -	txdctl |= IGC_TX_HTHRESH << 8;
> -	txdctl |= IGC_TX_WTHRESH << 16;
> +	txdctl |= IGC_TXDCTL_PTHRESH;
> +	txdctl |= IGC_TXDCTL_HTHRESH << 8;
> +	txdctl |= IGC_TXDCTL_WTHRESH << 16;
>   
>   	txdctl |= IGC_TXDCTL_QUEUE_ENABLE;
>   	wr32(IGC_TXDCTL(reg_idx), txdctl);

If you do this, I think you should apply the same change to the RXDCTL 
macros that are right next to the TXDCTL ones. Otherwise you are trading 
one inconsistency for another. :)
Abdul Rahim, Faizal April 29, 2025, 3:37 a.m. UTC | #2
On 28/4/2025 2:57 pm, Ruinskiy, Dima wrote:
> On 28/04/2025 9:02, Faizal Rahim wrote:
>> Rename macros to include the TXDCTL_ prefix for consistency and clarity.
>> This aligns naming with the register they configure and improves code
>> readability.
>>
>> Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
>> ---
>>   drivers/net/ethernet/intel/igc/igc.h      | 6 +++---
>>   drivers/net/ethernet/intel/igc/igc_main.c | 6 +++---
>>   2 files changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/ 
>> intel/igc/igc.h
>> index e9d180eac015..bc37cc8deefb 100644
>> --- a/drivers/net/ethernet/intel/igc/igc.h
>> +++ b/drivers/net/ethernet/intel/igc/igc.h
>> @@ -487,10 +487,10 @@ static inline u32 igc_rss_type(const union 
>> igc_adv_rx_desc *rx_desc)
>>    */
>>   #define IGC_RX_PTHRESH            8
>>   #define IGC_RX_HTHRESH            8
>> -#define IGC_TX_PTHRESH            8
>> -#define IGC_TX_HTHRESH            1
>> +#define IGC_TXDCTL_PTHRESH        8
>> +#define IGC_TXDCTL_HTHRESH        1
>>   #define IGC_RX_WTHRESH            4
>> -#define IGC_TX_WTHRESH            16
>> +#define IGC_TXDCTL_WTHRESH        16
>>   /* Additional Transmit Descriptor Control definitions */
>>   /* Ena specific Tx Queue */
>> diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ 
>> ethernet/intel/igc/igc_main.c
>> index 27575a1e1777..725c8f0b9f3d 100644
>> --- a/drivers/net/ethernet/intel/igc/igc_main.c
>> +++ b/drivers/net/ethernet/intel/igc/igc_main.c
>> @@ -749,9 +749,9 @@ static void igc_configure_tx_ring(struct igc_adapter 
>> *adapter,
>>       wr32(IGC_TDH(reg_idx), 0);
>>       writel(0, ring->tail);
>> -    txdctl |= IGC_TX_PTHRESH;
>> -    txdctl |= IGC_TX_HTHRESH << 8;
>> -    txdctl |= IGC_TX_WTHRESH << 16;
>> +    txdctl |= IGC_TXDCTL_PTHRESH;
>> +    txdctl |= IGC_TXDCTL_HTHRESH << 8;
>> +    txdctl |= IGC_TXDCTL_WTHRESH << 16;
>>       txdctl |= IGC_TXDCTL_QUEUE_ENABLE;
>>       wr32(IGC_TXDCTL(reg_idx), txdctl);
> 
> If you do this, I think you should apply the same change to the RXDCTL 
> macros that are right next to the TXDCTL ones. Otherwise you are trading 
> one inconsistency for another. :)

Will update
diff mbox series

Patch

diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h
index e9d180eac015..bc37cc8deefb 100644
--- a/drivers/net/ethernet/intel/igc/igc.h
+++ b/drivers/net/ethernet/intel/igc/igc.h
@@ -487,10 +487,10 @@  static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)
  */
 #define IGC_RX_PTHRESH			8
 #define IGC_RX_HTHRESH			8
-#define IGC_TX_PTHRESH			8
-#define IGC_TX_HTHRESH			1
+#define IGC_TXDCTL_PTHRESH		8
+#define IGC_TXDCTL_HTHRESH		1
 #define IGC_RX_WTHRESH			4
-#define IGC_TX_WTHRESH			16
+#define IGC_TXDCTL_WTHRESH		16
 
 /* Additional Transmit Descriptor Control definitions */
 /* Ena specific Tx Queue */
diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c
index 27575a1e1777..725c8f0b9f3d 100644
--- a/drivers/net/ethernet/intel/igc/igc_main.c
+++ b/drivers/net/ethernet/intel/igc/igc_main.c
@@ -749,9 +749,9 @@  static void igc_configure_tx_ring(struct igc_adapter *adapter,
 	wr32(IGC_TDH(reg_idx), 0);
 	writel(0, ring->tail);
 
-	txdctl |= IGC_TX_PTHRESH;
-	txdctl |= IGC_TX_HTHRESH << 8;
-	txdctl |= IGC_TX_WTHRESH << 16;
+	txdctl |= IGC_TXDCTL_PTHRESH;
+	txdctl |= IGC_TXDCTL_HTHRESH << 8;
+	txdctl |= IGC_TXDCTL_WTHRESH << 16;
 
 	txdctl |= IGC_TXDCTL_QUEUE_ENABLE;
 	wr32(IGC_TXDCTL(reg_idx), txdctl);