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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Wei Fang , Heiner Kallweit Date: Sat, 11 Feb 2023 08:41:05 +0100 Message-Id: <20230211074113.2782508-2-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230211074113.2782508-1-o.rempel@pengutronix.de> References: <20230211074113.2782508-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: intel-wired-lan@lists.osuosl.org X-Mailman-Approved-At: Mon, 13 Feb 2023 16:23:36 +0000 Subject: [Intel-wired-lan] [PATCH net-next v8 1/9] net: dsa: microchip: enable EEE support X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arun.Ramadoss@microchip.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Oleksij Rempel , intel-wired-lan@lists.osuosl.org, kernel@pengutronix.de Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" Some of KSZ9477 family switches provides EEE support. To enable it, we just need to register set_mac_eee/set_mac_eee handlers and validate supported chip version and port. Currently supported chip variants are: KSZ8563, KSZ9477, KSZ9563, KSZ9567, KSZ9893, KSZ9896, KSZ9897. KSZ8563 supports EEE only with 100BaseTX/Full. Other chips support 100BaseTX/Full and 1000BaseTX/Full. Low Power Idle configuration is not supported and currently not documented in the datasheets. EEE PHY specific tunings are not documented in the switch datasheets, but can overlap with KSZ9131 specification. Signed-off-by: Oleksij Rempel Reviewed-by: Andrew Lunn Acked-by: Arun Ramadoss --- drivers/net/dsa/microchip/ksz_common.c | 66 ++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 46becc0382d6..729b36eeb2c4 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -2673,6 +2673,70 @@ static int ksz_max_mtu(struct dsa_switch *ds, int port) return -EOPNOTSUPP; } +static int ksz_validate_eee(struct dsa_switch *ds, int port) +{ + struct ksz_device *dev = ds->priv; + + if (!dev->info->internal_phy[port]) + return -EOPNOTSUPP; + + switch (dev->chip_id) { + case KSZ8563_CHIP_ID: + case KSZ9477_CHIP_ID: + case KSZ9563_CHIP_ID: + case KSZ9567_CHIP_ID: + case KSZ9893_CHIP_ID: + case KSZ9896_CHIP_ID: + case KSZ9897_CHIP_ID: + return 0; + } + + return -EOPNOTSUPP; +} + +static int ksz_get_mac_eee(struct dsa_switch *ds, int port, + struct ethtool_eee *e) +{ + int ret; + + ret = ksz_validate_eee(ds, port); + if (ret) + return ret; + + /* There is no documented control of Tx LPI configuration. */ + e->tx_lpi_enabled = true; + + /* There is no documented control of Tx LPI timer. According to tests + * Tx LPI timer seems to be set by default to minimal value. + */ + e->tx_lpi_timer = 0; + + return 0; +} + +static int ksz_set_mac_eee(struct dsa_switch *ds, int port, + struct ethtool_eee *e) +{ + struct ksz_device *dev = ds->priv; + int ret; + + ret = ksz_validate_eee(ds, port); + if (ret) + return ret; + + if (!e->tx_lpi_enabled) { + dev_err(dev->dev, "Disabling EEE Tx LPI is not supported\n"); + return -EINVAL; + } + + if (e->tx_lpi_timer) { + dev_err(dev->dev, "Setting EEE Tx LPI timer is not supported\n"); + return -EINVAL; + } + + return 0; +} + static void ksz_set_xmii(struct ksz_device *dev, int port, phy_interface_t interface) { @@ -3130,6 +3194,8 @@ static const struct dsa_switch_ops ksz_switch_ops = { .port_txtstamp = ksz_port_txtstamp, .port_rxtstamp = ksz_port_rxtstamp, .port_setup_tc = ksz_setup_tc, + .get_mac_eee = ksz_get_mac_eee, + .set_mac_eee = ksz_set_mac_eee, }; struct ksz_device *ksz_switch_alloc(struct device *base, void *priv)