From patchwork Fri Mar 30 21:06:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 893527 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=osuosl.org (client-ip=140.211.166.138; helo=whitealder.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.org Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40CZ0k158yz9s2b for ; Sat, 31 Mar 2018 08:06:14 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 8BB8689F7D; Fri, 30 Mar 2018 21:06:12 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VB2yvMvxTnmv; Fri, 30 Mar 2018 21:06:10 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by whitealder.osuosl.org (Postfix) with ESMTP id 8AFFC89F76; Fri, 30 Mar 2018 21:06:10 +0000 (UTC) X-Original-To: intel-wired-lan@lists.osuosl.org Delivered-To: intel-wired-lan@lists.osuosl.org Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by ash.osuosl.org (Postfix) with ESMTP id C13C91C0E93 for ; Fri, 30 Mar 2018 21:06:09 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id BB3928AD55 for ; Fri, 30 Mar 2018 21:06:09 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id U46WSZJrUzud for ; Fri, 30 Mar 2018 21:06:08 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by hemlock.osuosl.org (Postfix) with ESMTPS id 491098AD54 for ; Fri, 30 Mar 2018 21:06:07 +0000 (UTC) Received: from localhost (unknown [69.71.5.252]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7A8BD21777; Fri, 30 Mar 2018 21:06:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7A8BD21777 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org From: Bjorn Helgaas To: Tal Gilboa Date: Fri, 30 Mar 2018 16:06:03 -0500 Message-ID: <152244396327.135666.7664182741063970438.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <152244269202.135666.3064353823697623332.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <152244269202.135666.3064353823697623332.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.18 MIME-Version: 1.0 Subject: [Intel-wired-lan] [PATCH v5 11/14] cxgb4: Report PCIe link properties with pcie_print_link_status() X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tariq Toukan , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Ariel Elior , intel-wired-lan@lists.osuosl.org, linux-pci@vger.kernel.org, everest-linux-l2@cavium.com, Ganesh Goudar Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Bjorn Helgaas Use pcie_print_link_status() to report PCIe link speed and possible limitations instead of implementing this in the driver itself. Note that pcie_get_minimum_link() can return misleading information because it finds the slowest link and the narrowest link without considering the total bandwidth of the link. If the path contains a 16 GT/s x1 link and a 2.5 GT/s x16 link, pcie_get_minimum_link() returns 2.5 GT/s x1, which corresponds to 250 MB/s of bandwidth, not the actual available bandwidth of about 2000 MB/s for a 16 GT/s x1 link. Signed-off-by: Bjorn Helgaas --- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 75 ----------------------- 1 file changed, 1 insertion(+), 74 deletions(-) diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 56bc626ef006..2d6864c8199e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c @@ -4762,79 +4762,6 @@ static int init_rss(struct adapter *adap) return 0; } -static int cxgb4_get_pcie_dev_link_caps(struct adapter *adap, - enum pci_bus_speed *speed, - enum pcie_link_width *width) -{ - u32 lnkcap1, lnkcap2; - int err1, err2; - -#define PCIE_MLW_CAP_SHIFT 4 /* start of MLW mask in link capabilities */ - - *speed = PCI_SPEED_UNKNOWN; - *width = PCIE_LNK_WIDTH_UNKNOWN; - - err1 = pcie_capability_read_dword(adap->pdev, PCI_EXP_LNKCAP, - &lnkcap1); - err2 = pcie_capability_read_dword(adap->pdev, PCI_EXP_LNKCAP2, - &lnkcap2); - if (!err2 && lnkcap2) { /* PCIe r3.0-compliant */ - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) - *speed = PCIE_SPEED_8_0GT; - else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) - *speed = PCIE_SPEED_5_0GT; - else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) - *speed = PCIE_SPEED_2_5GT; - } - if (!err1) { - *width = (lnkcap1 & PCI_EXP_LNKCAP_MLW) >> PCIE_MLW_CAP_SHIFT; - if (!lnkcap2) { /* pre-r3.0 */ - if (lnkcap1 & PCI_EXP_LNKCAP_SLS_5_0GB) - *speed = PCIE_SPEED_5_0GT; - else if (lnkcap1 & PCI_EXP_LNKCAP_SLS_2_5GB) - *speed = PCIE_SPEED_2_5GT; - } - } - - if (*speed == PCI_SPEED_UNKNOWN || *width == PCIE_LNK_WIDTH_UNKNOWN) - return err1 ? err1 : err2 ? err2 : -EINVAL; - return 0; -} - -static void cxgb4_check_pcie_caps(struct adapter *adap) -{ - enum pcie_link_width width, width_cap; - enum pci_bus_speed speed, speed_cap; - -#define PCIE_SPEED_STR(speed) \ - (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" : \ - speed == PCIE_SPEED_5_0GT ? "5.0GT/s" : \ - speed == PCIE_SPEED_2_5GT ? "2.5GT/s" : \ - "Unknown") - - if (cxgb4_get_pcie_dev_link_caps(adap, &speed_cap, &width_cap)) { - dev_warn(adap->pdev_dev, - "Unable to determine PCIe device BW capabilities\n"); - return; - } - - if (pcie_get_minimum_link(adap->pdev, &speed, &width) || - speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) { - dev_warn(adap->pdev_dev, - "Unable to determine PCI Express bandwidth.\n"); - return; - } - - dev_info(adap->pdev_dev, "PCIe link speed is %s, device supports %s\n", - PCIE_SPEED_STR(speed), PCIE_SPEED_STR(speed_cap)); - dev_info(adap->pdev_dev, "PCIe link width is x%d, device supports x%d\n", - width, width_cap); - if (speed < speed_cap || width < width_cap) - dev_info(adap->pdev_dev, - "A slot with more lanes and/or higher speed is " - "suggested for optimal performance.\n"); -} - /* Dump basic information about the adapter */ static void print_adapter_info(struct adapter *adapter) { @@ -5466,7 +5393,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) } /* check for PCI Express bandwidth capabiltites */ - cxgb4_check_pcie_caps(adapter); + pcie_print_link_status(pdev); err = init_rss(adapter); if (err)