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Fri, 05 Apr 2024 06:16:42 -0400 X-MC-Unique: U1fswUz8OvWUbk7GFA_hbw-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id DA5601C051A3 for ; Fri, 5 Apr 2024 10:16:41 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.39.192.59]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4C0F8492BCB for ; Fri, 5 Apr 2024 10:16:41 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Subject: [PATCH v3 3/3] aarch64: Enhanced CPU diagnostics for ld.so In-Reply-To: Message-ID: References: X-From-Line: ddf8aad3798c861d5b8916c309135a90bf655ff3 Mon Sep 17 00:00:00 2001 Date: Fri, 05 Apr 2024 12:16:36 +0200 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org This prints some information from struct cpu_features, and the midr_el1 and dczid_el0 system register contents on every CPU. --- manual/dynlink.texi | 34 +++++++++++ sysdeps/aarch64/dl-diagnostics-cpu.c | 84 ++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c diff --git a/manual/dynlink.texi b/manual/dynlink.texi index f2f2341818..6f4acf321d 100644 --- a/manual/dynlink.texi +++ b/manual/dynlink.texi @@ -224,6 +224,40 @@ reflect adjustment by @theglibc{}. These Linux-specific items show the values of @code{struct utsname}, as reported by the @code{uname} function. @xref{Platform Type}. +@item aarch64.cpu_features.@dots{} +These items are specific to the AArch64 architectures. They report data +that is used by @theglibc{} to select alternative function +implementations. + +@item aarch64.processor[@var{index}].@dots{} +These are additional items for the AArch64 architecture and are +described below. + +@item aarch64.processor[@var{index}].requested=@var{kernel-cpu} +The kernel is told to run the subsequent probing on the CPU numbered +@var{kernel-cpu}. The values @var{kernel-cpu} and @var{index} can be +distinct if there are gaps in the process CPU affinity mask. This line +is not included if CPU affinity mask information is not available. + +@item aarch64.processor[@var{index}].observed=@var{kernel-cpu} +This line reports the kernel CPU number @var{kernel-cpu} on which the +probing code initially ran. If the CPU number cannot be obtained, +this line is not printed. + +@item aarch64.processor[@var{index}].observed_node=@var{node} +This reports the observed NUMA node number, as reported by the +@code{getcpu} system call. If this information cannot be obtained, this +line is not printed. + +@item aarch64.processor[@var{index}].midr_el1=@var{value} +The value of the @code{midr_el1} system register on the processor +@var{index}. This line is only printed if the kernel indicates that +this system register is supported. + +@item aarch64.processor[@var{index}].dczid_el0=@var{value} +The value of the @code{dczid_el0} system register on the processor +@var{index}. + @cindex CPUID (diagnostics) @item x86.cpu_features.@dots{} These items are specific to the i386 and x86-64 architectures. They diff --git a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c new file mode 100644 index 0000000000..e037e6ea8c --- /dev/null +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c @@ -0,0 +1,84 @@ +/* Print CPU diagnostics data in ld.so. AArch64 version. + Copyright (C) 2021-2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +#include +#include +#include +#include + +static void +print_cpu_features_value (const char *label, uint64_t value) +{ + _dl_printf ("aarch64.cpu_features."); + _dl_diagnostics_print_labeled_value (label, value); +} + +static void +print_per_cpu_value (const struct dl_iterate_cpu *dic, + const char *label, uint64_t value) +{ + _dl_printf ("aarch64.processor[0x%x].", dic->processor_index); + _dl_diagnostics_print_labeled_value (label, value); +} + +void +_dl_diagnostics_cpu (void) +{ + print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti); + print_cpu_features_value ("midr_el1", + GLRO (dl_aarch64_cpu_features).midr_el1); + print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops); + print_cpu_features_value ("mte_state", + GLRO (dl_aarch64_cpu_features).mte_state); + print_cpu_features_value ("prefer_sve_ifuncs", + GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs); + print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve); + print_cpu_features_value ("zva_size", + GLRO (dl_aarch64_cpu_features).zva_size); + + struct dl_iterate_cpu dic; + _dl_iterate_cpu_init (&dic); + + while (_dl_iterate_cpu_next (&dic)) + { + if (dic.requested_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n", + dic.processor_index, dic.requested_cpu); + if (dic.actual_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n", + dic.processor_index, dic.actual_cpu); + if (dic.actual_node >= 0) + _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n", + dic.processor_index, dic.actual_node); + + if (GLRO (dl_hwcap) & HWCAP_CPUID) + { + uint64_t midr_el1; + asm ("mrs %0, midr_el1" : "=r" (midr_el1)); + print_per_cpu_value (&dic, "midr_el1", midr_el1); + } + + { + uint64_t dczid_el0; + asm ("mrs %0, dczid_el0" : "=r" (dczid_el0)); + print_per_cpu_value (&dic, "dczid_el0", dczid_el0); + } + } +}