| Message ID | VE1PR08MB5599059220A6495586778B6783040@VE1PR08MB5599.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | AArch64: Use __memcpy_simd on Neoverse N2/V1 | expand |
On 13/10/2020 10:11, Wilco Dijkstra via Libc-alpha wrote: > Add CPU detection of Neoverse N2 and Neoverse V1, and select __memcpy_simd as the > memcpy/memmove ifunc. > > Passes GLIBC testsuite. OK for commit? LGTM, however I could not verify if Neoverse PlatNum is the correct one. It is not upstream on linux kernel (arch/arm64/include/asm/cputype.h) neither on Linus tree on arm64/next branches. Is there an official public documentation that describes it? > > --- > > diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c > index 7cf5f033e8fcdcbfdfbfe73e6ad24d8b3fc79b66..799d60c98cfadfe0966a451d7e00af4040f719b8 100644 > --- a/sysdeps/aarch64/multiarch/memcpy.c > +++ b/sysdeps/aarch64/multiarch/memcpy.c > @@ -41,7 +41,8 @@ libc_ifunc (__libc_memcpy, > ? __memcpy_falkor > : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) > ? __memcpy_thunderx2 > - : (IS_NEOVERSE_N1 (midr) > + : (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr) > + || IS_NEOVERSE_V1 (midr) > ? __memcpy_simd > : __memcpy_generic))))); > > diff --git a/sysdeps/aarch64/multiarch/memmove.c b/sysdeps/aarch64/multiarch/memmove.c > index ad10aa8ac6fba884ffb3736ed6e73d16b6eaa60c..46a4cb3a54c73c7c64d26ff8d022947e485d82b7 100644 > --- a/sysdeps/aarch64/multiarch/memmove.c > +++ b/sysdeps/aarch64/multiarch/memmove.c > @@ -41,7 +41,8 @@ libc_ifunc (__libc_memmove, > ? __memmove_falkor > : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) > ? __memmove_thunderx2 > - : (IS_NEOVERSE_N1 (midr) > + : (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr) > + || IS_NEOVERSE_V1 (midr) > ? __memmove_simd > : __memmove_generic))))); > > diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h > index fc688450ee0e0f7cf58e73920263631a0ea7c8d6..00a4d0c8e75f5554120da6da9c079ed65904d394 100644 > --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h > +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h > @@ -54,6 +54,10 @@ > && MIDR_PARTNUM(midr) == 0x000) > #define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ > && MIDR_PARTNUM(midr) == 0xd0c) > +#define IS_NEOVERSE_N2(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ > + && MIDR_PARTNUM(midr) == 0xd49) > +#define IS_NEOVERSE_V1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ > + && MIDR_PARTNUM(midr) == 0xd40) > > #define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ > && MIDR_PARTNUM(midr) == 0x000) >
Hi Adhemerval, > LGTM, however I could not verify if Neoverse PlatNum is the correct one. > It is not upstream on linux kernel (arch/arm64/include/asm/cputype.h) > neither on Linus tree on arm64/next branches. Is there an official > public documentation that describes it? I don't think the TRMs are up yet, but GCC added support, so I copied those: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-cores.def#L140 Cheers, Wilco
On 13/10/2020 11:28, Wilco Dijkstra wrote: > Hi Adhemerval, > >> LGTM, however I could not verify if Neoverse PlatNum is the correct one. >> It is not upstream on linux kernel (arch/arm64/include/asm/cputype.h) >> neither on Linus tree on arm64/next branches. Is there an official >> public documentation that describes it? > > I don't think the TRMs are up yet, but GCC added support, so I copied those: > https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-cores.def#L140 > > Cheers, > Wilco > Fair enough then. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c index 7cf5f033e8fcdcbfdfbfe73e6ad24d8b3fc79b66..799d60c98cfadfe0966a451d7e00af4040f719b8 100644 --- a/sysdeps/aarch64/multiarch/memcpy.c +++ b/sysdeps/aarch64/multiarch/memcpy.c @@ -41,7 +41,8 @@ libc_ifunc (__libc_memcpy, ? __memcpy_falkor : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) ? __memcpy_thunderx2 - : (IS_NEOVERSE_N1 (midr) + : (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr) + || IS_NEOVERSE_V1 (midr) ? __memcpy_simd : __memcpy_generic))))); diff --git a/sysdeps/aarch64/multiarch/memmove.c b/sysdeps/aarch64/multiarch/memmove.c index ad10aa8ac6fba884ffb3736ed6e73d16b6eaa60c..46a4cb3a54c73c7c64d26ff8d022947e485d82b7 100644 --- a/sysdeps/aarch64/multiarch/memmove.c +++ b/sysdeps/aarch64/multiarch/memmove.c @@ -41,7 +41,8 @@ libc_ifunc (__libc_memmove, ? __memmove_falkor : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) ? __memmove_thunderx2 - : (IS_NEOVERSE_N1 (midr) + : (IS_NEOVERSE_N1 (midr) || IS_NEOVERSE_N2 (midr) + || IS_NEOVERSE_V1 (midr) ? __memmove_simd : __memmove_generic))))); diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index fc688450ee0e0f7cf58e73920263631a0ea7c8d6..00a4d0c8e75f5554120da6da9c079ed65904d394 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -54,6 +54,10 @@ && MIDR_PARTNUM(midr) == 0x000) #define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ && MIDR_PARTNUM(midr) == 0xd0c) +#define IS_NEOVERSE_N2(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ + && MIDR_PARTNUM(midr) == 0xd49) +#define IS_NEOVERSE_V1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ + && MIDR_PARTNUM(midr) == 0xd40) #define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ && MIDR_PARTNUM(midr) == 0x000)