From patchwork Sun Feb 1 08:46:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Miller X-Patchwork-Id: 435213 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5552B140280 for ; Sun, 1 Feb 2015 19:46:51 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:message-id:to:subject:from:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=Te7 0msKvMNgqx+TSLGqWz/kJ0roKtQ+QyLpCgie4yAk8eBtRVZU4qFJ5GWU1MH8SUDo okFqEZPXjxm113HkdQx9/loLbMcGJV14v9zISn65ygAVSVXakx2iLO7BSTw5kmJN v8w2JNi8FyI2XG9J+UNMvS5+KAty0HXC9ODb03SU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:message-id:to:subject:from:mime-version :content-type:content-transfer-encoding; s=default; bh=8iyImmfNu XxHoYZbkBgJ8kyfIK4=; b=Epo3qOcSU0qlChQeQeNRCHpnCQL7kL4RTzhO9/4D3 UNZO3Pik9SxauT+9Utc8qKW+rEFKLwdpmlU817Sg/LsT7ORvJsc7V9T5tA3ha3XJ xwCv3HcNfolmFVFaUGV76l+SJIdBb0eSWiXE+EExklgUm6yanLLtWH5q6T55Adp9 8I= Received: (qmail 7066 invoked by alias); 1 Feb 2015 08:46:27 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 7038 invoked by uid 89); 1 Feb 2015 08:46:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00 autolearn=ham version=3.3.2 X-HELO: shards.monkeyblade.net Date: Sun, 01 Feb 2015 00:46:23 -0800 (PST) Message-Id: <20150201.004623.15409017073621052.davem@davemloft.net> To: libc-alpha@sourceware.org Subject: [PATCH COMMITTED] Fix two bugs in sparc atomics. From: David Miller Mime-Version: 1.0 * sysdeps/sparc/sparc32/bits/atomic.h (__sparc32_atomic_do_unlock24): Put the memory barrier before the unlock not after it. (__v9_compare_and_exchange_val_32_acq): Use unions to avoid getting volatile register usage warnings from the compiler. --- ChangeLog | 6 ++++++ sysdeps/sparc/sparc32/bits/atomic.h | 15 ++++++++------- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/ChangeLog b/ChangeLog index 0376c5d..50e8153 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,11 @@ 2015-01-31 David S. Miller + * sysdeps/sparc/sparc32/bits/atomic.h + (__sparc32_atomic_do_unlock24): Put the memory barrier before the + unlock not after it. + (__v9_compare_and_exchange_val_32_acq): Use unions to avoid getting + volatile register usage warnings from the compiler. + * sysdeps/sparc/nptl/sem_init.c: Delete. * sysdeps/sparc/nptl/sem_post.c: Delete. * sysdeps/sparc/nptl/sem_timedwait.c: Delete. diff --git a/sysdeps/sparc/sparc32/bits/atomic.h b/sysdeps/sparc/sparc32/bits/atomic.h index 5f21b83..4242ba8 100644 --- a/sysdeps/sparc/sparc32/bits/atomic.h +++ b/sysdeps/sparc/sparc32/bits/atomic.h @@ -105,27 +105,28 @@ volatile unsigned char __sparc32_atomic_locks[64] #define __sparc32_atomic_do_unlock24(addr) \ do \ { \ - *(char *) (addr) = 0; \ __asm __volatile ("" ::: "memory"); \ + *(char *) (addr) = 0; \ } \ while (0) #ifndef SHARED # define __v9_compare_and_exchange_val_32_acq(mem, newval, oldval) \ -({ \ - register __typeof (*(mem)) __acev_tmp __asm ("%g6"); \ +({union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) }; \ + union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) }; \ + register uint32_t __acev_tmp __asm ("%g6"); \ register __typeof (mem) __acev_mem __asm ("%g1") = (mem); \ - register __typeof (*(mem)) __acev_oldval __asm ("%g5"); \ - __acev_tmp = (newval); \ - __acev_oldval = (oldval); \ + register uint32_t __acev_oldval __asm ("%g5"); \ + __acev_tmp = newval_arg.v; \ + __acev_oldval = oldval_arg.v; \ /* .word 0xcde05005 is cas [%g1], %g5, %g6. Can't use cas here though, \ because as will then mark the object file as V8+ arch. */ \ __asm __volatile (".word 0xcde05005" \ : "+r" (__acev_tmp), "=m" (*__acev_mem) \ : "r" (__acev_oldval), "m" (*__acev_mem), \ "r" (__acev_mem) : "memory"); \ - __acev_tmp; }) + (__typeof (oldval)) __acev_tmp; }) #endif /* The only basic operation needed is compare and exchange. */