From patchwork Mon Mar 7 14:59:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Pandey X-Patchwork-Id: 1602295 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=e2og/NS+; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KC2hS0TPlz9sFk for ; Tue, 8 Mar 2022 02:39:52 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9B602385841B for ; Mon, 7 Mar 2022 15:39:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9B602385841B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1646667589; bh=6Gsiuk+He6oaHgXARLL9Wrrd5o9PZZ1VqIPB9q8f2Sk=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=e2og/NS+z5pWs6sWdBYyagpfSFxWDDOFApjlysdpdYyrAgFg494CyWZE3hpcKMnQu LchFPGJIRgqrKcYMiYopLi3UPkxjdnk4iZ2yEUBSrA++G9yFFkIKBUUFWMsOokWvxY +7riNluijNJDOjAM15kbvQSMDyxzZHPcvxvN3sUE= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 151FF3858412 for ; Mon, 7 Mar 2022 15:02:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 151FF3858412 X-IronPort-AV: E=McAfee;i="6200,9189,10278"; a="251983654" X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="251983654" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 07:02:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,162,1643702400"; d="scan'208";a="610639855" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga004.fm.intel.com with ESMTP; 07 Mar 2022 07:02:02 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 227F21dY016772; Mon, 7 Mar 2022 07:02:02 -0800 To: libc-alpha@sourceware.org Subject: [PATCH 000/126] x86_64: Fix libmvec assembly code formatting Date: Mon, 7 Mar 2022 06:59:55 -0800 Message-Id: <20220307150201.10590-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_SOFTFAIL, SPOOFED_FREEMAIL, SPOOF_GMAIL_MID, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sunil K Pandey via Libc-alpha From: Sunil Pandey Reply-To: Sunil K Pandey Errors-To: libc-alpha-bounces+incoming=patchwork.ozlabs.org@sourceware.org Sender: "Libc-alpha" This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. Sunil K Pandey (126): x86_64: Fix svml_s_acosf16_core_avx512.S code formatting x86_64: Fix svml_s_acosf4_core_sse4.S code formatting x86_64: Fix svml_s_acosf8_core_avx2.S code formatting x86_64: Fix svml_d_acos2_core_sse4.S code formatting x86_64: Fix svml_d_acos4_core_avx2.S code formatting x86_64: Fix svml_d_acos8_core_avx512.S code formatting x86_64: Fix svml_s_acoshf16_core_avx512.S code formatting x86_64: Fix svml_s_acoshf4_core_sse4.S code formatting x86_64: Fix svml_s_acoshf8_core_avx2.S code formatting x86_64: Fix svml_d_acosh2_core_sse4.S code formatting x86_64: Fix svml_d_acosh4_core_avx2.S code formatting x86_64: Fix svml_d_acosh8_core_avx512.S code formatting x86_64: Fix svml_s_asinf16_core_avx512.S code formatting x86_64: Fix svml_s_asinf4_core_sse4.S code formatting x86_64: Fix svml_s_asinf8_core_avx2.S code formatting x86_64: Fix svml_d_asin2_core_sse4.S code formatting x86_64: Fix svml_d_asin4_core_avx2.S code formatting x86_64: Fix svml_d_asin8_core_avx512.S code formatting x86_64: Fix svml_s_asinhf16_core_avx512.S code formatting x86_64: Fix svml_s_asinhf4_core_sse4.S code formatting x86_64: Fix svml_s_asinhf8_core_avx2.S code formatting x86_64: Fix svml_d_asinh2_core_sse4.S code formatting x86_64: Fix svml_d_asinh4_core_avx2.S code formatting x86_64: Fix svml_d_asinh8_core_avx512.S code formatting x86_64: Fix svml_s_atanf16_core_avx512.S code formatting x86_64: Fix svml_s_atanf4_core_sse4.S code formatting x86_64: Fix svml_s_atanf8_core_avx2.S code formatting x86_64: Fix svml_d_atan2_core_sse4.S code formatting x86_64: Fix svml_d_atan4_core_avx2.S code formatting x86_64: Fix svml_d_atan8_core_avx512.S code formatting x86_64: Fix svml_s_atan2f16_core_avx512.S code formatting x86_64: Fix svml_s_atan2f4_core_sse4.S code formatting x86_64: Fix svml_s_atan2f8_core_avx2.S code formatting x86_64: Fix svml_d_atan22_core_sse4.S code formatting x86_64: Fix svml_d_atan24_core_avx2.S code formatting x86_64: Fix svml_d_atan28_core_avx512.S code formatting x86_64: Fix svml_s_atanhf16_core_avx512.S code formatting x86_64: Fix svml_s_atanhf4_core_sse4.S code formatting x86_64: Fix svml_s_atanhf8_core_avx2.S code formatting x86_64: Fix svml_d_atanh2_core_sse4.S code formatting x86_64: Fix svml_d_atanh4_core_avx2.S code formatting x86_64: Fix svml_d_atanh8_core_avx512.S code formatting x86_64: Fix svml_s_cbrtf16_core_avx512.S code formatting x86_64: Fix svml_s_cbrtf4_core_sse4.S code formatting x86_64: Fix svml_s_cbrtf8_core_avx2.S code formatting x86_64: Fix svml_d_cbrt2_core_sse4.S code formatting x86_64: Fix svml_d_cbrt4_core_avx2.S code formatting x86_64: Fix svml_d_cbrt8_core_avx512.S code formatting x86_64: Fix svml_s_coshf16_core_avx512.S code formatting x86_64: Fix svml_s_coshf4_core_sse4.S code formatting x86_64: Fix svml_s_coshf8_core_avx2.S code formatting x86_64: Fix svml_d_cosh2_core_sse4.S code formatting x86_64: Fix svml_d_cosh4_core_avx2.S code formatting x86_64: Fix svml_d_cosh8_core_avx512.S code formatting x86_64: Fix svml_s_erff16_core_avx512.S code formatting x86_64: Fix svml_s_erff4_core_sse4.S code formatting x86_64: Fix svml_s_erff8_core_avx2.S code formatting x86_64: Fix svml_d_erf2_core_sse4.S code formatting x86_64: Fix svml_d_erf4_core_avx2.S code formatting x86_64: Fix svml_d_erf8_core_avx512.S code formatting x86_64: Fix svml_s_erfcf16_core_avx512.S code formatting x86_64: Fix svml_s_erfcf4_core_sse4.S code formatting x86_64: Fix svml_s_erfcf8_core_avx2.S code formatting x86_64: Fix svml_d_erfc2_core_sse4.S code formatting x86_64: Fix svml_d_erfc4_core_avx2.S code formatting x86_64: Fix svml_d_erfc8_core_avx512.S code formatting x86_64: Fix svml_s_exp10f16_core_avx512.S code formatting x86_64: Fix svml_s_exp10f4_core_sse4.S code formatting x86_64: Fix svml_s_exp10f8_core_avx2.S code formatting x86_64: Fix svml_d_exp102_core_sse4.S code formatting x86_64: Fix svml_d_exp104_core_avx2.S code formatting x86_64: Fix svml_d_exp108_core_avx512.S code formatting x86_64: Fix svml_s_exp2f16_core_avx512.S code formatting x86_64: Fix svml_s_exp2f4_core_sse4.S code formatting x86_64: Fix svml_s_exp2f8_core_avx2.S code formatting x86_64: Fix svml_d_exp22_core_sse4.S code formatting x86_64: Fix svml_d_exp24_core_avx2.S code formatting x86_64: Fix svml_d_exp28_core_avx512.S code formatting x86_64: Fix svml_s_expm1f16_core_avx512.S code formatting x86_64: Fix svml_s_expm1f4_core_sse4.S code formatting x86_64: Fix svml_s_expm1f8_core_avx2.S code formatting x86_64: Fix svml_d_expm12_core_sse4.S code formatting x86_64: Fix svml_d_expm14_core_avx2.S code formatting x86_64: Fix svml_d_expm18_core_avx512.S code formatting x86_64: Fix svml_s_hypotf16_core_avx512.S code formatting x86_64: Fix svml_s_hypotf4_core_sse4.S code formatting x86_64: Fix svml_s_hypotf8_core_avx2.S code formatting x86_64: Fix svml_d_hypot2_core_sse4.S code formatting x86_64: Fix svml_d_hypot4_core_avx2.S code formatting x86_64: Fix svml_d_hypot8_core_avx512.S code formatting x86_64: Fix svml_s_log10f16_core_avx512.S code formatting x86_64: Fix svml_s_log10f4_core_sse4.S code formatting x86_64: Fix svml_s_log10f8_core_avx2.S code formatting x86_64: Fix svml_d_log102_core_sse4.S code formatting x86_64: Fix svml_d_log104_core_avx2.S code formatting x86_64: Fix svml_d_log108_core_avx512.S code formatting x86_64: Fix svml_s_log1pf16_core_avx512.S code formatting x86_64: Fix svml_s_log1pf4_core_sse4.S code formatting x86_64: Fix svml_s_log1pf8_core_avx2.S code formatting x86_64: Fix svml_d_log1p2_core_sse4.S code formatting x86_64: Fix svml_d_log1p4_core_avx2.S code formatting x86_64: Fix svml_d_log1p8_core_avx512.S code formatting x86_64: Fix svml_s_log2f16_core_avx512.S code formatting x86_64: Fix svml_s_log2f4_core_sse4.S code formatting x86_64: Fix svml_s_log2f8_core_avx2.S code formatting x86_64: Fix svml_d_log22_core_sse4.S code formatting x86_64: Fix svml_d_log24_core_avx2.S code formatting x86_64: Fix svml_d_log28_core_avx512.S code formatting x86_64: Fix svml_s_sinhf16_core_avx512.S code formatting x86_64: Fix svml_s_sinhf4_core_sse4.S code formatting x86_64: Fix svml_s_sinhf8_core_avx2.S code formatting x86_64: Fix svml_d_sinh2_core_sse4.S code formatting x86_64: Fix svml_d_sinh4_core_avx2.S code formatting x86_64: Fix svml_d_sinh8_core_avx512.S code formatting x86_64: Fix svml_s_tanf16_core_avx512.S code formatting x86_64: Fix svml_s_tanf4_core_sse4.S code formatting x86_64: Fix svml_s_tanf8_core_avx2.S code formatting x86_64: Fix svml_d_tan2_core_sse4.S code formatting x86_64: Fix svml_d_tan4_core_avx2.S code formatting x86_64: Fix svml_d_tan8_core_avx512.S code formatting x86_64: Fix svml_s_tanhf16_core_avx512.S code formatting x86_64: Fix svml_s_tanhf4_core_sse4.S code formatting x86_64: Fix svml_s_tanhf8_core_avx2.S code formatting x86_64: Fix svml_d_tanh2_core_sse4.S code formatting x86_64: Fix svml_d_tanh4_core_avx2.S code formatting x86_64: Fix svml_d_tanh8_core_avx512.S code formatting .../fpu/multiarch/svml_d_acos2_core_sse4.S | 489 +- .../fpu/multiarch/svml_d_acos4_core_avx2.S | 455 +- .../fpu/multiarch/svml_d_acos8_core_avx512.S | 499 +- .../fpu/multiarch/svml_d_acosh2_core_sse4.S | 2741 ++-- .../fpu/multiarch/svml_d_acosh4_core_avx2.S | 2871 ++-- .../fpu/multiarch/svml_d_acosh8_core_avx512.S | 831 +- .../fpu/multiarch/svml_d_asin2_core_sse4.S | 461 +- .../fpu/multiarch/svml_d_asin4_core_avx2.S | 433 +- .../fpu/multiarch/svml_d_asin8_core_avx512.S | 477 +- .../fpu/multiarch/svml_d_asinh2_core_sse4.S | 3195 ++-- .../fpu/multiarch/svml_d_asinh4_core_avx2.S | 3077 ++-- .../fpu/multiarch/svml_d_asinh8_core_avx512.S | 871 +- .../fpu/multiarch/svml_d_atan22_core_sse4.S | 861 +- .../fpu/multiarch/svml_d_atan24_core_avx2.S | 775 +- .../fpu/multiarch/svml_d_atan28_core_avx512.S | 823 +- .../fpu/multiarch/svml_d_atan2_core_sse4.S | 395 +- .../fpu/multiarch/svml_d_atan4_core_avx2.S | 355 +- .../fpu/multiarch/svml_d_atan8_core_avx512.S | 331 +- .../fpu/multiarch/svml_d_atanh2_core_sse4.S | 2835 ++-- .../fpu/multiarch/svml_d_atanh4_core_avx2.S | 2757 ++-- .../fpu/multiarch/svml_d_atanh8_core_avx512.S | 679 +- .../fpu/multiarch/svml_d_cbrt2_core_sse4.S | 814 +- .../fpu/multiarch/svml_d_cbrt4_core_avx2.S | 880 +- .../fpu/multiarch/svml_d_cbrt8_core_avx512.S | 413 +- .../fpu/multiarch/svml_d_cosh2_core_sse4.S | 664 +- .../fpu/multiarch/svml_d_cosh4_core_avx2.S | 698 +- .../fpu/multiarch/svml_d_cosh8_core_avx512.S | 520 +- .../fpu/multiarch/svml_d_erf2_core_sse4.S | 1848 ++- .../fpu/multiarch/svml_d_erf4_core_avx2.S | 1842 ++- .../fpu/multiarch/svml_d_erf8_core_avx512.S | 1840 ++- .../fpu/multiarch/svml_d_erfc2_core_sse4.S | 7548 +++++----- .../fpu/multiarch/svml_d_erfc4_core_avx2.S | 7552 +++++----- .../fpu/multiarch/svml_d_erfc8_core_avx512.S | 7560 +++++----- .../fpu/multiarch/svml_d_exp102_core_sse4.S | 694 +- .../fpu/multiarch/svml_d_exp104_core_avx2.S | 716 +- .../fpu/multiarch/svml_d_exp108_core_avx512.S | 457 +- .../fpu/multiarch/svml_d_exp22_core_sse4.S | 508 +- .../fpu/multiarch/svml_d_exp24_core_avx2.S | 540 +- .../fpu/multiarch/svml_d_exp28_core_avx512.S | 439 +- .../fpu/multiarch/svml_d_expm12_core_sse4.S | 723 +- .../fpu/multiarch/svml_d_expm14_core_avx2.S | 701 +- .../fpu/multiarch/svml_d_expm18_core_avx512.S | 549 +- .../fpu/multiarch/svml_d_hypot2_core_sse4.S | 374 +- .../fpu/multiarch/svml_d_hypot4_core_avx2.S | 394 +- .../fpu/multiarch/svml_d_hypot8_core_avx512.S | 286 +- .../fpu/multiarch/svml_d_log102_core_sse4.S | 2011 ++- .../fpu/multiarch/svml_d_log104_core_avx2.S | 1983 ++- .../fpu/multiarch/svml_d_log108_core_avx512.S | 483 +- .../fpu/multiarch/svml_d_log1p2_core_sse4.S | 2615 ++-- .../fpu/multiarch/svml_d_log1p4_core_avx2.S | 2587 ++-- .../fpu/multiarch/svml_d_log1p8_core_avx512.S | 519 +- .../fpu/multiarch/svml_d_log22_core_sse4.S | 2511 ++-- .../fpu/multiarch/svml_d_log24_core_avx2.S | 2483 ++-- .../fpu/multiarch/svml_d_log28_core_avx512.S | 471 +- .../fpu/multiarch/svml_d_sinh2_core_sse4.S | 784 +- .../fpu/multiarch/svml_d_sinh4_core_avx2.S | 814 +- .../fpu/multiarch/svml_d_sinh8_core_avx512.S | 796 +- .../fpu/multiarch/svml_d_tan2_core_sse4.S | 12143 ++++++++-------- .../fpu/multiarch/svml_d_tan4_core_avx2.S | 12091 ++++++++------- .../fpu/multiarch/svml_d_tan8_core_avx512.S | 5245 ++++--- .../fpu/multiarch/svml_d_tanh2_core_sse4.S | 2318 ++- .../fpu/multiarch/svml_d_tanh4_core_avx2.S | 2330 ++- .../fpu/multiarch/svml_d_tanh8_core_avx512.S | 718 +- .../multiarch/svml_s_acosf16_core_avx512.S | 28 +- .../fpu/multiarch/svml_s_acosf4_core_sse4.S | 423 +- .../fpu/multiarch/svml_s_acosf8_core_avx2.S | 411 +- .../multiarch/svml_s_acoshf16_core_avx512.S | 743 +- .../fpu/multiarch/svml_s_acoshf4_core_sse4.S | 653 +- .../fpu/multiarch/svml_s_acoshf8_core_avx2.S | 615 +- .../multiarch/svml_s_asinf16_core_avx512.S | 405 +- .../fpu/multiarch/svml_s_asinf4_core_sse4.S | 387 +- .../fpu/multiarch/svml_s_asinf8_core_avx2.S | 383 +- .../multiarch/svml_s_asinhf16_core_avx512.S | 739 +- .../fpu/multiarch/svml_s_asinhf4_core_sse4.S | 895 +- .../fpu/multiarch/svml_s_asinhf8_core_avx2.S | 793 +- .../multiarch/svml_s_atan2f16_core_avx512.S | 669 +- .../fpu/multiarch/svml_s_atan2f4_core_sse4.S | 639 +- .../fpu/multiarch/svml_s_atan2f8_core_avx2.S | 593 +- .../multiarch/svml_s_atanf16_core_avx512.S | 257 +- .../fpu/multiarch/svml_s_atanf4_core_sse4.S | 229 +- .../fpu/multiarch/svml_s_atanf8_core_avx2.S | 197 +- .../multiarch/svml_s_atanhf16_core_avx512.S | 663 +- .../fpu/multiarch/svml_s_atanhf4_core_sse4.S | 597 +- .../fpu/multiarch/svml_s_atanhf8_core_avx2.S | 547 +- .../multiarch/svml_s_cbrtf16_core_avx512.S | 377 +- .../fpu/multiarch/svml_s_cbrtf4_core_sse4.S | 856 +- .../fpu/multiarch/svml_s_cbrtf8_core_avx2.S | 898 +- .../multiarch/svml_s_coshf16_core_avx512.S | 516 +- .../fpu/multiarch/svml_s_coshf4_core_sse4.S | 484 +- .../fpu/multiarch/svml_s_coshf8_core_avx2.S | 490 +- .../multiarch/svml_s_erfcf16_core_avx512.S | 1744 ++- .../fpu/multiarch/svml_s_erfcf4_core_sse4.S | 1756 ++- .../fpu/multiarch/svml_s_erfcf8_core_avx2.S | 1794 ++- .../fpu/multiarch/svml_s_erff16_core_avx512.S | 260 +- .../fpu/multiarch/svml_s_erff4_core_sse4.S | 1208 +- .../fpu/multiarch/svml_s_erff8_core_avx2.S | 1218 +- .../multiarch/svml_s_exp10f16_core_avx512.S | 421 +- .../fpu/multiarch/svml_s_exp10f4_core_sse4.S | 478 +- .../fpu/multiarch/svml_s_exp10f8_core_avx2.S | 520 +- .../multiarch/svml_s_exp2f16_core_avx512.S | 379 +- .../fpu/multiarch/svml_s_exp2f4_core_sse4.S | 334 +- .../fpu/multiarch/svml_s_exp2f8_core_avx2.S | 348 +- .../multiarch/svml_s_expm1f16_core_avx512.S | 443 +- .../fpu/multiarch/svml_s_expm1f4_core_sse4.S | 597 +- .../fpu/multiarch/svml_s_expm1f8_core_avx2.S | 587 +- .../multiarch/svml_s_hypotf16_core_avx512.S | 274 +- .../fpu/multiarch/svml_s_hypotf4_core_sse4.S | 326 +- .../fpu/multiarch/svml_s_hypotf8_core_avx2.S | 334 +- .../multiarch/svml_s_log10f16_core_avx512.S | 361 +- .../fpu/multiarch/svml_s_log10f4_core_sse4.S | 369 +- .../fpu/multiarch/svml_s_log10f8_core_avx2.S | 369 +- .../multiarch/svml_s_log1pf16_core_avx512.S | 425 +- .../fpu/multiarch/svml_s_log1pf4_core_sse4.S | 387 +- .../fpu/multiarch/svml_s_log1pf8_core_avx2.S | 391 +- .../multiarch/svml_s_log2f16_core_avx512.S | 347 +- .../fpu/multiarch/svml_s_log2f4_core_sse4.S | 329 +- .../fpu/multiarch/svml_s_log2f8_core_avx2.S | 335 +- .../multiarch/svml_s_sinhf16_core_avx512.S | 510 +- .../fpu/multiarch/svml_s_sinhf4_core_sse4.S | 490 +- .../fpu/multiarch/svml_s_sinhf8_core_avx2.S | 492 +- .../fpu/multiarch/svml_s_tanf16_core_avx512.S | 1633 ++- .../fpu/multiarch/svml_s_tanf4_core_sse4.S | 5019 ++++--- .../fpu/multiarch/svml_s_tanf8_core_avx2.S | 4937 ++++--- .../multiarch/svml_s_tanhf16_core_avx512.S | 536 +- .../fpu/multiarch/svml_s_tanhf4_core_sse4.S | 1440 +- .../fpu/multiarch/svml_s_tanhf8_core_avx2.S | 1462 +- 126 files changed, 82414 insertions(+), 82599 deletions(-)