From patchwork Wed Apr 3 10:56:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Murray X-Patchwork-Id: 1075765 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-101150-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="XqyILHYI"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44Z31B4dhLz9sSN for ; Wed, 3 Apr 2019 21:56:45 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; q=dns; s=default; b=YP8 uncXEsKLkBlavuJpOjKBV9HESNHFhRc4JWEXpYn179WdX7nj4rgJ7KZtEdISCU/Q HIjEQe1531wt0XUFVFMZTcc+n4bsO5M6hOBi0ug0iY42o/4dHVfM/qqiK+B1Ego7 sTFVRUuxJ4/bowqLw1dEbiSm9y0KxUjHGSZiPVNc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; s=default; bh=z7wZ9hQ/t azZx8ZCCBnvNvRaAvU=; b=XqyILHYIGMdaZTVdfwNDYCSxfy00m8P3iZjp54pTv aM2R9IQlQBFH9mGHkNuB5WGkOa7KG/SaxKA9Jpw7v8J9ClGUb3wUFcARzDGkfDDg 2HQ26hPaWIJgoBf1oyUd/zrEFheuC41/KGllqvgU75ZE2RZz/nH+Vk+Dmi6K0SXf Bk= Received: (qmail 37568 invoked by alias); 3 Apr 2019 10:56:39 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 37546 invoked by uid 89); 3 Apr 2019 10:56:38 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-14.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Languages-Length:2702 X-HELO: foss.arm.com From: Andrew Murray To: Catalin Marinas , Will Deacon Cc: Szabolcs Nagy , dave.martin@arm.com, linux-arm-kernel@lists.infradead.org, Mark Rutland , Phil Blundell , libc-alpha@sourceware.org, linux-api@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v4 0/6] arm64: Initial support for CVADP Date: Wed, 3 Apr 2019 11:56:22 +0100 Message-Id: <20190403105628.39798-1-andrew.murray@arm.com> MIME-Version: 1.0 ARMv8.5 introduces a DC CVADP instruction which cleans the data cache to the point of deep persistence. This series makes the instruction available to userspace and advertises the presence of this CPU feature. At present when CONFIG_ARM64_PMEM is enabled and the CVAP feature is present (ARMv8.2) the CVAP instruction is used (from memcpy_flushcache and arch_wb_cache_pmem). No changes have been made to use CVADP in these functions or similar. As we have moved beyond 32 capabilities we now begin using AT_HWCAP2 for userspace. Tested as follows: $ dmesg | grep "Deep" [ 0.166496] CPU features: detected: Data cache clean to Point of Deep Persistence $ LD_SHOW_AUXV=1 sleep 2>&1 | grep AT_HWCAP AT_HWCAP: ef91ff87 AT_HWCAP2: 0x1 Changes since v3: - Rebased onto v5.1-rc3 - Add macros for mapping uapi HWCAPs to KERNEL_HWCAPs - Squash AT_HWCAP2 documentation into AT_HWCAP2 patch - Reorder series to allow HWCAP changes to be taken without CVADP (if needed) - Additional comments, changes to comments and commit messages Changes since v2: - Rebased onto v5.1-rc2 - Renamed cpu_{have,set}_feature_name to cpu_{have,set}_named_feature - Add additional comments and update kernel Documentation Changes since v1: - Rebased onto v5.0-rc7 - Introduced cpu_{have,set}_feature_name to eliminate use of KERNEL_HWCAP prefix - Hard coded MAX_CPU_FEATURES and added a WARN_ON - Minor comment and tab/spacing changes - Use elf_hwcap for all 64 caps in the kernel instead of a new elf_hwcap2 Andrew Murray (6): arm64: HWCAP: add support for AT_HWCAP2 arm64: HWCAP: encapsulate elf_hwcap arm64: Handle trapped DC CVADP arm64: Expose DC CVADP to userspace arm64: add CVADP support to the cache maintenance helper arm64: Advertise ARM64_HAS_DCPODP cpu feature Documentation/arm64/elf_hwcaps.txt | 18 +++- arch/arm64/crypto/aes-ce-ccm-glue.c | 2 +- arch/arm64/crypto/aes-neonbs-glue.c | 2 +- arch/arm64/crypto/chacha-neon-glue.c | 2 +- arch/arm64/crypto/crct10dif-ce-glue.c | 4 +- arch/arm64/crypto/ghash-ce-glue.c | 8 +- arch/arm64/crypto/nhpoly1305-neon-glue.c | 2 +- arch/arm64/crypto/sha256-glue.c | 4 +- arch/arm64/include/asm/assembler.h | 4 + arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 21 ++--- arch/arm64/include/asm/esr.h | 3 +- arch/arm64/include/asm/hwcap.h | 53 ++++++++++- arch/arm64/include/uapi/asm/hwcap.h | 7 +- arch/arm64/kernel/cpufeature.c | 109 +++++++++++++++-------- arch/arm64/kernel/cpuinfo.c | 3 +- arch/arm64/kernel/fpsimd.c | 4 +- arch/arm64/kernel/traps.c | 3 + drivers/clocksource/arm_arch_timer.c | 8 ++ 19 files changed, 189 insertions(+), 71 deletions(-)