From patchwork Fri Jun 11 19:20:53 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 55351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id DA176B7D1A for ; Sat, 12 Jun 2010 05:21:30 +1000 (EST) Received: (qmail 15248 invoked by alias); 11 Jun 2010 19:21:13 -0000 Received: (qmail 15228 invoked by uid 22791); 11 Jun 2010 19:21:12 -0000 X-SWARE-Spam-Status: No, hits=-4.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, SPF_HELO_PASS, T_RP_MATCHES_RCVD, T_TVD_MIME_NO_HEADERS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 11 Jun 2010 19:20:59 +0000 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o5BJKwE5018393 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 11 Jun 2010 15:20:58 -0400 Received: from localhost.localdomain (ovpn01.gateway.prod.ext.phx2.redhat.com [10.5.9.1]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o5BJKuUV032354 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 11 Jun 2010 15:20:57 -0400 Received: from livre.localdomain (livre.oliva.athome.lsd.ic.unicamp.br [172.31.160.2]) by localhost.localdomain (8.14.3/8.14.3) with ESMTP id o5BJKt2N020875 for ; Fri, 11 Jun 2010 16:20:55 -0300 Received: from livre.localdomain (aoliva@localhost [127.0.0.1]) by livre.localdomain (8.14.3/8.14.3/Debian-5+lenny1) with ESMTP id o5BJKsn5014512; Fri, 11 Jun 2010 16:20:55 -0300 Received: (from aoliva@localhost) by livre.localdomain (8.14.3/8.14.3/Submit) id o5BJKrhG014511; Fri, 11 Jun 2010 16:20:53 -0300 From: Alexandre Oliva To: gcc-patches@gcc.gnu.org Subject: [PR43656] skip debug insns in -fsched-pressure Date: Fri, 11 Jun 2010 16:20:53 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.1 (gnu/linux) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org We didn't take debug insns into account when initializing register pressure computations, but updates would sometimes take reg uses in debug insns into account. This patch fixes this, so that we get the same scheduling. Bootstrapped the compiler, along with the just-posted patch for PR44181, on x86_64-linux-gnu, with the following options: -O2 -g -fschedule-insns -fsched-pressure -funroll-loops -fgraphite-identity for stage2 and stage3 host, and for stage3 libs (also -fcompare-debug) I got build failures on zlib and libada, presumably because of this unusual combination of flags, but no -fcompare-debug errors. Ok to install? for gcc/ChangeLog from Alexandre Oliva PR debug/43656 * haifa-sched.c (setup_insn_reg_pressure_info, update_register_pressure): Reject debug insns. (ready_sort): Don't setup reg pressure for debug insns. (schedule_insn): Don't update reg pressure for debug insns. Index: gcc/haifa-sched.c =================================================================== --- gcc/haifa-sched.c.orig 2010-06-11 10:56:20.000000000 -0300 +++ gcc/haifa-sched.c 2010-06-11 10:56:21.000000000 -0300 @@ -1124,6 +1124,8 @@ setup_insn_reg_pressure_info (rtx insn) struct reg_use_data *use; static int death[N_REG_CLASSES]; + gcc_checking_assert (!DEBUG_INSN_P (insn)); + excess_cost_change = 0; for (i = 0; i < ira_reg_class_cover_size; i++) death[ira_reg_class_cover[i]] = 0; @@ -1500,7 +1502,8 @@ ready_sort (struct ready_list *ready) if (sched_pressure_p) { for (i = 0; i < ready->n_ready; i++) - setup_insn_reg_pressure_info (first[i]); + if (!DEBUG_INSN_P (first[i])) + setup_insn_reg_pressure_info (first[i]); } SCHED_SORT (first, ready->n_ready); } @@ -1564,6 +1567,8 @@ update_register_pressure (rtx insn) struct reg_use_data *use; struct reg_set_data *set; + gcc_checking_assert (!DEBUG_INSN_P (insn)); + for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use) if (dying_use_p (use) && bitmap_bit_p (curr_reg_live, use->regno)) mark_regno_birth_or_death (use->regno, false); @@ -1684,7 +1689,7 @@ schedule_insn (rtx insn) fputc ('\n', sched_dump); } - if (sched_pressure_p) + if (sched_pressure_p && !DEBUG_INSN_P (insn)) update_reg_and_insn_max_reg_pressure (insn); /* Scheduling instruction should have all its dependencies resolved and