diff mbox series

[pushed] aarch64: Disassociate ls64 from simd

Message ID mpth71b65ip.fsf@arm.com
State New
Headers show
Series [pushed] aarch64: Disassociate ls64 from simd | expand

Commit Message

Richard Sandiford Sept. 13, 2022, 8:30 a.m. UTC 
The ls64-related move expanders and splits required TARGET_SIMD.
That isn't necessary, since the 64-byte values are stored entirely
in GPRs.  (The associated define_insn was already correct.)

I wondered about moving the patterns to aarch64.md, but it wasn't
clear-cut.

Tested on aarch64-linux-gnu & pushed.

Richard


gcc/
	* config/aarch64/aarch64-simd.md (movv8di): Remove TARGET_SIMD
	condition.  Likewise for the related define_split.  Tweak formatting.

gcc/testsuite/
	* gcc.target/aarch64/acle/ls64_asm_2.c: New test.
---
 gcc/config/aarch64/aarch64-simd.md             | 18 +++++++++---------
 .../gcc.target/aarch64/acle/ls64_asm_2.c       |  9 +++++++++
 2 files changed, 18 insertions(+), 9 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 587a45d7772..d4662c76a58 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -7087,7 +7087,7 @@  (define_expand "mov<mode>"
 (define_expand "movv8di"
   [(set (match_operand:V8DI 0 "nonimmediate_operand")
 	(match_operand:V8DI 1 "general_operand"))]
-  "TARGET_SIMD"
+  ""
 {
   if (can_create_pseudo_p () && MEM_P (operands[0]))
     operands[1] = force_reg (V8DImode, operands[1]);
@@ -7479,7 +7479,7 @@  (define_split
 (define_split
   [(set (match_operand:V8DI 0 "nonimmediate_operand")
         (match_operand:V8DI 1 "general_operand"))]
-  "TARGET_SIMD && reload_completed"
+  "reload_completed"
   [(const_int 0)]
 {
   if (register_operand (operands[0], V8DImode)
@@ -7489,15 +7489,15 @@  (define_split
       DONE;
     }
   else if ((register_operand (operands[0], V8DImode)
-            && memory_operand (operands[1], V8DImode))
-           || (memory_operand (operands[0], V8DImode)
-            && register_operand (operands[1], V8DImode)))
+	    && memory_operand (operands[1], V8DImode))
+	   || (memory_operand (operands[0], V8DImode)
+	       && register_operand (operands[1], V8DImode)))
     {
       for (int offset = 0; offset < 64; offset += 16)
-        emit_move_insn (simplify_gen_subreg (TImode, operands[0],
-                                             V8DImode, offset),
-                        simplify_gen_subreg (TImode, operands[1],
-                                             V8DImode, offset));
+	emit_move_insn (simplify_gen_subreg (TImode, operands[0],
+					     V8DImode, offset),
+			simplify_gen_subreg (TImode, operands[1],
+					     V8DImode, offset));
       DONE;
     }
   else
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c
new file mode 100644
index 00000000000..1b4277180a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_asm_2.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+#pragma GCC target "+ls64+nofp"
+
+#include "ls64_asm.c"
+
+/* { dg-final { scan-assembler-times {\tldp\t} 12 } } */
+/* { dg-final { scan-assembler-times {\tstp\t} 4 } } */