From patchwork Tue Nov 5 00:09:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Lance Taylor X-Patchwork-Id: 288339 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A257A2C0126 for ; Tue, 5 Nov 2013 11:11:14 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=KsKk/qgAxnR53OdJOFsF3HqYaKdYpZdVxfNsqzcuACi5urtQeYTKU 6b1jpLPq2jKUzcNMK9E5isIa8LHPv2tR0StHA4l0x6N+4LL6FZtiEmOD9FVj93xW MqIpG6LuF1nsuG4EfYQe1OMr3vbuoCfl2UwU2j/suuTNnNtykXn+zs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=TlX2IZVLsglE140OZi+ySM60bj8=; b=uAhebFZNneMKR7gb3wUE sD32x8oHrre+GRufMrxFoxrsu01lnwQfOC+pdigG6g0PizyQykxjfmeoc8YWs0Vr 1TeIdF5j4gzihYXtyuRuCZmujdhdISrDbzhfAiu9q1DajFeQQphS1Qw76GN/N6AJ /Kcmx3qr02Jcxpppfo4YcsY= Received: (qmail 6178 invoked by alias); 5 Nov 2013 00:10:42 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6145 invoked by uid 89); 5 Nov 2013 00:10:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.2 required=5.0 tests=AWL, BAYES_20, RCVD_IN_DNSWL_LOW, RDNS_NONE, SPF_PASS, T_TVD_MIME_NO_HEADERS, URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mail-pa0-f51.google.com Received: from Unknown (HELO mail-pa0-f51.google.com) (209.85.220.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 05 Nov 2013 00:09:48 +0000 Received: by mail-pa0-f51.google.com with SMTP id ld10so7744550pab.10 for ; Mon, 04 Nov 2013 16:09:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:user-agent :mime-version:content-type; bh=NeunUjmmIQAtjPeif5/K/d0/RsqsfZPgGPDqUsiCBig=; b=jv5cZi79XyNR2YHDsaRkS7ExFe9MQOeCrVjChvaSxynWQ4jyb3XxfBwJ+ZzWHW4cpa kQXdpEE+HiPKfYsbZU3XhPVmH1xpOgqGfBj7gaACR0Vqm82lD39wiVz9/qVWnmKhqMvJ /XOQzu/0QMitbM5mPSeHfm1FAF/543ddzV/46gR/ePcZxLcVbVbztQYB7CejTedGFtf8 AGkryWkppPWfI1UaI8QquWcPD1X+eH1UqXNs8jq+Xd596CHPu3tDz33KLZw2zEzoZ/9C AoIM/fuohsKTUDbTThP0VSeCTm0Y/ZunbAjHjbuS/KiOzX7RTYb8kx+beGO2q/LxuFyq f0FQ== X-Gm-Message-State: ALoCoQkEDoV4GQ2p80VgxW8ax9O4KgdEveFkn+0ap7q7dNVLMWMyL50nMitVNt1WE4obLoR/hAsoufJBm/ct/+B+ZsBwL38QLRQgPTytO//gSkU7AAB4hCm5umm4H3yA1QoZ5LsTTQYvuErbUEmTtsn4UFfdCkMnEOkpPbF753WjnE+dZdz3Iiqg7FmMrRyPTkn0ncm+WWwEMFitMxc1B9RW/ERzaXLbbQ== X-Received: by 10.68.109.195 with SMTP id hu3mr20154412pbb.123.1383610180835; Mon, 04 Nov 2013 16:09:40 -0800 (PST) Received: from iant-glaptop.roam.corp.google.com.google.com ([172.19.250.20]) by mx.google.com with ESMTPSA id pl1sm30646408pbb.20.2013.11.04.16.09.37 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 04 Nov 2013 16:09:39 -0800 (PST) From: Ian Lance Taylor To: gcc-patches@gcc.gnu.org Subject: Patch RFC: x86: Emit .cfi directives for BX register swap Date: Mon, 04 Nov 2013 16:09:33 -0800 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (gnu/linux) MIME-Version: 1.0 X-IsSubscribed: yes This patch to the x86 backend adds .cfi directives for the BX register swap in the atomic compare-and-exchange-doubleword insn. If we don't do this, then when compiling with -fnon-call-exceptions, if the cmpxchg8 memory address is invalid, and the SIGSEGV signal handler throws an exception, the BX register value will not be restored when unwinding past the cmpxchg8. The effect is that BX will have some unpredictable value, which is bad because BX is callee-saved. This patch is not perfect, because not all systems support .cfi directives. Unfortunately as far as I know we don't have the framework we need to emit the appropriate CFI opcodes for this insn. It might be possible to make it work by splitting the insn after register allocation, creating separate insns to which to attach CFA_REGISTER notes. I have not tried this. This patch is in any case an improvement on the current situation for modern systems. There is a test case for this in the libgo update I am going to commit soon. I don't have a non-Go test case. It's not too hard to contruct a test case that crosses shared library boundaries, because 32-bit mode relies on %ebx, but it's somewhat painful to construct a test case that does not involve shared libraries. I don't think I need permission to commit this patch, but I will wait for a day to hear any comments that people may have. Bootstrapped and tested on x86_64-unknown-linux-gnu. Ian 2013-11-04 Ian Lance Taylor * config/i386/sync.md (atomic_compare_and_swap_doubleword): If possible, add .cfi directives to record change to bx. * config/i386/i386.c (ix86_emit_cfi): New function. * config/i386/i386-protos.h (ix86_emit_cfi): Declare. Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 204359) +++ config/i386/i386.c (working copy) @@ -17340,6 +17340,14 @@ ix86_split_idivmod (enum machine_mode mo emit_label (end_label); } +/* Whether it is OK to emit CFI directives when emitting asm code. */ + +bool +ix86_emit_cfi () +{ + return dwarf2out_do_cfi_asm (); +} + #define LEA_MAX_STALL (3) #define LEA_SEARCH_THRESHOLD (LEA_MAX_STALL << 1) Index: config/i386/sync.md =================================================================== --- config/i386/sync.md (revision 204359) +++ config/i386/sync.md (working copy) @@ -430,10 +430,21 @@ const char *xchg = "xchg{}\t%%bx, %5"; if (swap) - output_asm_insn (xchg, operands); + { + output_asm_insn (xchg, operands); + if (ix86_emit_cfi ()) + { + output_asm_insn (".cfi_remember_state", operands); + output_asm_insn (".cfi_register\t%%bx, %5", operands); + } + } output_asm_insn ("lock{%;} %K7cmpxchgb\t%2", operands); if (swap) - output_asm_insn (xchg, operands); + { + output_asm_insn (xchg, operands); + if (ix86_emit_cfi ()) + output_asm_insn (".cfi_restore_state", operands); + } return ""; }) Index: config/i386/i386-protos.h =================================================================== --- config/i386/i386-protos.h (revision 204359) +++ config/i386/i386-protos.h (working copy) @@ -143,6 +143,7 @@ extern void ix86_split_lshr (rtx *, rtx, extern rtx ix86_find_base_term (rtx); extern bool ix86_check_movabs (rtx, int); extern void ix86_split_idivmod (enum machine_mode, rtx[], bool); +extern bool ix86_emit_cfi (); extern rtx assign_386_stack_local (enum machine_mode, enum ix86_stack_slot); extern int ix86_attr_length_immediate_default (rtx, bool);