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Subject: [PATCH][GCC] aarch64: Fix SCHEDULER_IDENT for Cortex-A520
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| Series |
aarch64: Fix SCHEDULER_IDENT for Cortex-A520
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expand
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On 12/03/2024 14:08, Richard Ball wrote: > The SCHEDULER_IDENT for this CPU was incorrectly > set to cortexa55, which is incorrect. This can cause > sub-optimal asm to be generated. > > Ok for trunk? > > gcc/ChangeLog: > PR target/114272 > * config/aarch64/aarch64-cores.def (AARCH64_CORE): > Change SCHEDULER_IDENT from cortexa55 to cortexa53 > for Cortex-A520. I don't see having this as a separate patch to the one for Cortex-A510 as having any value. Please merge the two together. A merged patch is pre-approved. R.
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index ea84dcb11a2c11fb7d8ada3b66b3caaa39f08daf..f69fc212d56418887e29615f8acdeb02e39750c6 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -171,7 +171,7 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, V8R, (), cortexa53, 0x41, 0xd15 /* Arm ('A') cores. */ AARCH64_CORE("cortex-a510", cortexa510, cortexa53, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1) -AARCH64_CORE("cortex-a520", cortexa520, cortexa55, V9_2A, (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1) +AARCH64_CORE("cortex-a520", cortexa520, cortexa53, V9_2A, (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1) AARCH64_CORE("cortex-a710", cortexa710, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1)