From patchwork Wed Oct 31 11:13:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Renlin Li X-Patchwork-Id: 991344 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-488718-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="sse2Evvi"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42lQh91mPBz9rxp for ; Wed, 31 Oct 2018 22:13:59 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=Xi0OyNkme6CpfmyDfV4OHiAcdaCRfP3aY+PY7T71PGmUr1tl/f 6znoIB8SnxCh/SBeW7WVrWs/HnUXtsLX3SlSIYm22E/k/DlNoO70AQWEUklowJ+l siMRQs/eDiznfm/Zv/Z4TSeSP4YVqSqg3ybiRkvnskBqSwNNFv/hLtvUQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=fy7qsiPup1gpsegMJ/kTp33C6BY=; b=sse2Evvij5fPM+K7slkZ meOjZtbHB9/UHuypv6iZ0VA4FnpGh1eFfXaCXvz4m2vNbV14hWwEXalgrd2O+fmr bS2WQx8di+twbGrVpbsj6ab4lRFCISedEs35zmlWA9Xiv/aXPoAMoJUFnRRgdDYo C1AWDCunWMuSK3Oj/YsIYLU= Received: (qmail 60353 invoked by alias); 31 Oct 2018 11:13:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 60340 invoked by uid 89); 31 Oct 2018 11:13:51 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 31 Oct 2018 11:13:50 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8F81680D; Wed, 31 Oct 2018 04:13:48 -0700 (PDT) Received: from [10.2.206.82] (e109742-lin.cambridge.arm.com [10.2.206.82]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C2AB83F71D; Wed, 31 Oct 2018 04:13:47 -0700 (PDT) To: "gcc-patches@gcc.gnu.org" , Ramana Radhakrishnan , Richard Sandiford , James Greenhalgh From: Renlin Li Subject: [PR87815]Don't generate shift sequence for load replacement in DSE when the mode size is not compile-time constant Message-ID: Date: Wed, 31 Oct 2018 11:13:45 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi all, The patch adds a check if the gap is compile-time constant. This happens when dse decides to replace the load with previous store value. The problem is that, shift sequence could not accept compile-time non-constant mode operand. Another issue raised from this issue is the inefficient code-generation for general data manipulation over mask/predicate register. In sve, some general data processing instructions don't apply on predicate registers directly. In the worst(this) case, memory load/store is generated to reload the value into a general purpose register for further data processing. We need to improve that. aarch64 sve test Okay, Okay to commit? Regards, Renlin gcc/ChangeLog: 2018-10-31 Renlin Li PR target/87815 * dse.c (get_stored_val): Add check for compile-time constantness of gap. gcc/testsuite/ChangeLog: 2018-10-31 Renlin Li PR target/87815 * gcc.target/aarch64/sve/pr87815.c: New. diff --git a/gcc/dse.c b/gcc/dse.c index cfebfa0e110be56f17337dcb152984d782528889..21d166d92fcc2c2a4dd6d04bb7a7247b79b81a62 100644 --- a/gcc/dse.c +++ b/gcc/dse.c @@ -1841,7 +1841,7 @@ get_stored_val (store_info *store_info, machine_mode read_mode, else gap = read_offset - store_info->offset; - if (maybe_ne (gap, 0)) + if (gap.is_constant () && maybe_ne (gap, 0)) { poly_int64 shift = gap * BITS_PER_UNIT; poly_int64 access_size = GET_MODE_SIZE (read_mode) + gap; diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c b/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c new file mode 100644 index 0000000000000000000000000000000000000000..628cedb2acce82a86b61944eb6184d7fdbb2d656 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O3" } */ +int a, b, d; +short e; + +void f () +{ + for (int i = 0; i < 8; i++) + { + e = b >= 2 ?: a >> b; + d = e && b; + } +}