| Message ID | ea20c990-c886-5c3c-66af-f8f196306885@vnet.ibm.com |
|---|---|
| State | New |
| Headers | show |
On Thu, Jun 30, 2016 at 05:55:04PM -0500, Peter Bergner wrote: > We currently don't allow TDmode values to use direct moves, since they > live in register pairs and the most significant word is always in the > even-numbered register which does not match subreg ordering in little > endian mode. The following patch fixes PR71698 by disallowing reload > from using direct moves for TDmode values. > > This passed bootstrap and regtesting with no regressions. Ok for trunk? Yes, this is okay. Thanks! > This is also broken on the FSF 6 branch, so is this ok there too after > bootstrap and regtesting there? Okay. Segher
On 6/30/16 6:21 PM, Segher Boessenkool wrote: > On Thu, Jun 30, 2016 at 05:55:04PM -0500, Peter Bergner wrote: >> We currently don't allow TDmode values to use direct moves, since they >> live in register pairs and the most significant word is always in the >> even-numbered register which does not match subreg ordering in little >> endian mode. The following patch fixes PR71698 by disallowing reload >> from using direct moves for TDmode values. >> >> This passed bootstrap and regtesting with no regressions. Ok for trunk? > > Yes, this is okay. Thanks! > >> This is also broken on the FSF 6 branch, so is this ok there too after >> bootstrap and regtesting there? > > Okay. Committed to trunk and the FSF 6 branch after bootstrap and regtesting there showed no regressions. Thanks! Peter
Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 237893) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -19194,7 +19194,8 @@ rs6000_secondary_reload_simple_move (enu simple move insns are issued. At present, 32-bit integers are not allowed in FPR/VSX registers. Single precision binary floating is not a simple move because we need to convert to the single precision memory layout. - The 4-byte SDmode can be moved. */ + The 4-byte SDmode can be moved. TDmode values are disallowed since they + need special direct move handling, which we do not support yet. */ size = GET_MODE_SIZE (mode); if (TARGET_DIRECT_MOVE && ((mode == SDmode) || (TARGET_POWERPC64 && size == 8)) @@ -19202,7 +19203,7 @@ rs6000_secondary_reload_simple_move (enu || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE))) return true; - else if (TARGET_DIRECT_MOVE_128 && size == 16 + else if (TARGET_DIRECT_MOVE_128 && size == 16 && mode != TDmode && ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE) || (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE))) return true; Index: gcc/testsuite/gcc.target/powerpc/pr71698.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr71698.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/pr71698.c (working copy) @@ -0,0 +1,13 @@ +/* Test for a reload ICE arising from trying to direct move a TDmode value. */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target dfp } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */ + +extern void testvad128 (int n, ...); +void +testitd128 (_Decimal128 g01d128) +{ + testvad128 (1, g01d128); +}