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[v2,rs6000] Add documentation for __builtin_mtfsf

Message ID e0cd61ad-11b0-9bdc-c65b-3edc9288bc19@us.ibm.com
State New
Headers show
Series [v2,rs6000] Add documentation for __builtin_mtfsf | expand

Commit Message

Paul A. Clarke July 22, 2019, 2 p.m. UTC
2019-07-21  Paul A. Clarke  <pc@us.ibm.com>

[gcc]

	* doc/extend.texi: Add documentation for __builtin_mtfsf.

v2: wordsmithing at Segher's request.  I'm having a hard time not saying too much.  :-)

Comments

Segher Boessenkool July 22, 2019, 9:36 p.m. UTC | #1
On Mon, Jul 22, 2019 at 09:00:08AM -0500, Paul Clarke wrote:
> 
> 2019-07-21  Paul A. Clarke  <pc@us.ibm.com>
> 
> [gcc]
> 
> 	* doc/extend.texi: Add documentation for __builtin_mtfsf.

It should mention the section this is in...  That is "Basic PowerPC
Built-in Functions Available on all Configurations" I think?

> v2: wordsmithing at Segher's request.  I'm having a hard time not saying too much.  :-)

:-)

> -accessing the sticky status bits.  The
> +accessing the sticky status bits.  The @code{__builtin_mtfsf} takes a constant
> +8-bit integer field mask and a representation of the new value of the FPSCR
> +and generates the @code{mtfsf} (extended mnemonic) instruction to write new
> +values to selected fields of the FPSCR.  The

"The @code{__builtin_mtfsf} takes a constant 8-bit integer field mask
and a double precision floating point argument, and generates" etc.?

(It's not a representation of the new value, it says nothing about the
fields you do *not* write).

Okay for trunk with such a change.  All backports are fine as well.
Thanks!


Segher
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Patch

Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi	(revision 273615)
+++ gcc/doc/extend.texi	(working copy)
@@ -16848,6 +16848,7 @@  unsigned long __builtin_ppc_mftb ();
 double __builtin_unpack_ibm128 (__ibm128, int);
 __ibm128 __builtin_pack_ibm128 (double, double);
 double __builtin_mffs (void);
+double __builtin_mtfsf (const int, double);
 void __builtin_mtfsb0 (const int);
 void __builtin_mtfsb1 (const int);
 void __builtin_set_fpscr_rn (int);
@@ -16863,7 +16864,10 @@  the most significant word on 32-bit environments.
 return the value of the FPSCR register.  Note, ISA 3.0 supports the
 @code{__builtin_mffsl()} which permits software to read the control and
 non-sticky status bits in the FSPCR without the higher latency associated with
-accessing the sticky status bits.  The
+accessing the sticky status bits.  The @code{__builtin_mtfsf} takes a constant
+8-bit integer field mask and a representation of the new value of the FPSCR
+and generates the @code{mtfsf} (extended mnemonic) instruction to write new
+values to selected fields of the FPSCR.  The
 @code{__builtin_mtfsb0} and @code{__builtin_mtfsb1} take the bit to change
 as an argument.  The valid bit range is between 0 and 31.  The builtins map to
 the @code{mtfsb0} and @code{mtfsb1} instructions which take the argument and