@@ -7050,25 +7050,21 @@ (define_insn "*movcc_internal1"
mt%0 %1
lwz%U1%X1 %0,%1
stw%U0%X0 %1,%0"
- [(set (attr "type")
- (cond [(eq_attr "alternative" "0,3")
- (const_string "cr_logical")
- (eq_attr "alternative" "1,2")
- (const_string "mtcr")
- (eq_attr "alternative" "6,7")
- (const_string "integer")
- (eq_attr "alternative" "8")
- (const_string "mfjmpr")
- (eq_attr "alternative" "9")
- (const_string "mtjmpr")
- (eq_attr "alternative" "10")
- (const_string "load")
- (eq_attr "alternative" "11")
- (const_string "store")
- (match_test "TARGET_MFCRF")
- (const_string "mfcrf")
- ]
- (const_string "mfcr")))
+ [(set_attr_alternative "type"
+ [(const_string "cr_logical")
+ (const_string "mtcr")
+ (const_string "mtcr")
+ (const_string "cr_logical")
+ (if_then_else (match_test "TARGET_MFCRF")
+ (const_string "mfcrf") (const_string "mfcr"))
+ (if_then_else (match_test "TARGET_MFCRF")
+ (const_string "mfcrf") (const_string "mfcr"))
+ (const_string "integer")
+ (const_string "integer")
+ (const_string "mfjmpr")
+ (const_string "mtjmpr")
+ (const_string "load")
+ (const_string "store")])
(set_attr "length" "4,4,12,4,4,8,4,4,4,4,4,4")])
;; For floating-point, we normally deal with the floating-point registers
@@ -10431,22 +10427,17 @@ (define_insn "*call_indirect_nonlocal_sysv<mode>"
return "crset 2\;beq%T0l-";
}
[(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
- (set (attr "length")
- (cond [(and (eq (symbol_ref "which_alternative") (const_int 0))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (ne (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "12")
- (eq (symbol_ref "which_alternative") (const_int 3))
- (const_string "8")]
- (const_string "4")))])
+ (set_attr_alternative "length"
+ [(if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "8")
+ (const_string "4"))
+ (const_string "4")
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "12")
+ (const_string "8"))
+ (const_string "8")])])
(define_insn_and_split "*call_nonlocal_sysv<mode>"
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
@@ -10538,22 +10529,17 @@ (define_insn "*call_value_indirect_nonlocal_sysv<mode>"
return "crset 2\;beq%T1l-";
}
[(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
- (set (attr "length")
- (cond [(and (eq (symbol_ref "which_alternative") (const_int 0))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (ne (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "12")
- (eq (symbol_ref "which_alternative") (const_int 3))
- (const_string "8")]
- (const_string "4")))])
+ (set_attr_alternative "length"
+ [(if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "8")
+ (const_string "4"))
+ (const_string "4")
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "12")
+ (const_string "8"))
+ (const_string "8")])])
(define_insn_and_split "*call_value_nonlocal_sysv<mode>"
[(set (match_operand 0 "" "")
@@ -10947,22 +10933,17 @@ (define_insn "*sibcall_nonlocal_sysv<mode>"
return "b %z0";
}
[(set_attr "type" "branch")
- (set (attr "length")
- (cond [(eq (symbol_ref "which_alternative") (const_int 1))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "12")
- (and (eq (symbol_ref "which_alternative") (const_int 3))
- (ne (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 3))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "16")]
- (const_string "4")))])
+ (set_attr_alternative "length"
+ [(const_string "4")
+ (const_string "8")
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "12")
+ (const_string "4"))
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "16")
+ (const_string "8"))])])
(define_insn "*sibcall_value_nonlocal_sysv<mode>"
[(set (match_operand 0 "" "")
@@ -10997,22 +10978,17 @@ (define_insn "*sibcall_value_nonlocal_sysv<mode>"
return "b %z1";
}
[(set_attr "type" "branch")
- (set (attr "length")
- (cond [(eq (symbol_ref "which_alternative") (const_int 1))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 2))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "12")
- (and (eq (symbol_ref "which_alternative") (const_int 3))
- (ne (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "8")
- (and (eq (symbol_ref "which_alternative") (const_int 3))
- (eq (symbol_ref "rs6000_speculate_indirect_jumps")
- (const_int 0)))
- (const_string "16")]
- (const_string "4")))])
+ (set_attr_alternative "length"
+ [(const_string "4")
+ (const_string "8")
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "12")
+ (const_string "4"))
+ (if_then_else (eq (symbol_ref "rs6000_speculate_indirect_jumps")
+ (const_int 0))
+ (const_string "16")
+ (const_string "8"))])])
;; AIX ABI sibling call patterns.
@@ -12645,17 +12621,16 @@ (define_insn "<bd>_<mode>"
return "<bd_neg> $+8\;b %l0";
}
[(set_attr "type" "branch")
- (set (attr "length")
- (cond [(eq (symbol_ref "which_alternative") (const_int 0))
- (if_then_else (and (ge (minus (match_dup 0) (pc))
- (const_int -32768))
- (lt (minus (match_dup 0) (pc))
- (const_int 32764)))
- (const_int 4)
- (const_int 8))
- (eq (symbol_ref "which_alternative") (const_int 1))
- (const_int 16)]
- (const_int 20)))])
+ (set_attr_alternative "length"
+ [(if_then_else (and (ge (minus (match_dup 0) (pc))
+ (const_int -32768))
+ (lt (minus (match_dup 0) (pc))
+ (const_int 32764)))
+ (const_int 4)
+ (const_int 8))
+ (const_string "16")
+ (const_string "20")
+ (const_string "20")])])
;; Now the splitter if we could not allocate the CTR register
(define_split
@@ -12734,17 +12709,16 @@ (define_insn "<bd>tf_<mode>"
}
}
[(set_attr "type" "branch")
- (set (attr "length")
- (cond [(eq (symbol_ref "which_alternative") (const_int 0))
- (if_then_else (and (ge (minus (match_dup 0) (pc))
- (const_int -32768))
- (lt (minus (match_dup 0) (pc))
- (const_int 32764)))
- (const_int 4)
- (const_int 8))
- (eq (symbol_ref "which_alternative") (const_int 1))
- (const_int 16)]
- (const_int 20)))])
+ (set_attr_alternative "length"
+ [(if_then_else (and (ge (minus (match_dup 0) (pc))
+ (const_int -32768))
+ (lt (minus (match_dup 0) (pc))
+ (const_int 32764)))
+ (const_int 4)
+ (const_int 8))
+ (const_string "16")
+ (const_string "20")
+ (const_string "20")])])
;; Now the splitter if we could not allocate the CTR register
(define_split