| Message ID | d3e65485-20e4-9513-3bc5-a6f964fc99b7@yahoo.co.jp |
|---|---|
| State | New |
| Headers | show |
| Series | xtensa: Eliminate the use of callee-saved register that saves and restores only once | expand |
Hi Suwa-san, On Sun, Jan 15, 2023 at 6:53 PM Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> wrote: > > In the case of the CALL0 ABI, values that must be retained before and > after function calls are placed in the callee-saved registers (A12 > through A15) and referenced later. However, it is often the case that > the save and the reference are each only once and a simple register- > register move. > > e.g. in the following example, if there are no other occurrences of > register A14: > > ;; before > ; prologue { > ... > s32i.n a14, sp, 16 > ... > ; } prologue > ... > mov.n a14, a6 > ... > call0 foo > ... > mov.n a8, a14 > ... > ; epilogue { > ... > l32i.n a14, sp, 16 > ... > ; } epilogue > > It can be possible like this: > > ;; after > ; prologue { > ... > (deleted) > ... > ; } prologue > ... > s32i.n a6, sp, 16 > ... > call0 foo > ... > l32i.n a8, sp, 16 > ... > ; epilogue { > ... > (deleted) > ... > ; } epilogue > > This patch introduces a new peephole2 pattern that implements the above. > > gcc/ChangeLog: > > * config/xtensa/xtensa.md: New peephole2 pattern that eliminates > the use of callee-saved register that saves and restores only once > for other register, by using its stack slot directly. > --- > gcc/config/xtensa/xtensa.md | 58 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) This change introduces a bunch of test failures in cases where alloca or similar mechanisms are used in a function and a15 is used as a stack frame pointer. E.g., gcc.c-torture/execute/pr82210.c has the following diff: @@ -20,9 +20,8 @@ srli a10, a10, 4 slli a10, a10, 4 s32i.n a12, sp, 8 - s32i.n a15, sp, 0 s32i.n a0, sp, 12 - mov.n a15, sp + s32i.n sp, sp, 0 sub sp, sp, a10 mov.n a6, sp mov.n a12, a6 @@ -59,11 +58,10 @@ addi.n a2, a2, 4 bne a12, a13, .L6 .L1: - mov.n sp, a15 + l32i.n sp, sp, 0 l32i.n a0, sp, 12 l32i.n a12, sp, 8 l32i.n a13, sp, 4 - l32i.n a15, sp, 0 addi sp, sp, 16 ret.n .size foo, .-foo
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 764da63f91c..249147688ac 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -3024,3 +3024,61 @@ FALLTHRU:; operands[1] = GEN_INT (imm0); operands[2] = GEN_INT (imm1); }) + +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (match_operand:SI 1 "reload_operand"))] + "!TARGET_WINDOWED_ABI && df + && epilogue_contains (insn) + && ! call_used_or_fixed_reg_p (REGNO (operands[0]))" + [(const_int 0)] +{ + rtx reg = operands[0], pattern; + rtx_insn *insnP = NULL, *insnS = NULL, *insnR = NULL; + df_ref ref; + rtx_insn *insn; + for (ref = DF_REG_DEF_CHAIN (REGNO (reg)); + ref; ref = DF_REF_NEXT_REG (ref)) + if (DF_REF_CLASS (ref) != DF_REF_REGULAR) + continue; + else if ((insn = DF_REF_INSN (ref)) == curr_insn) + continue; + else if (GET_CODE (pattern = PATTERN (insn)) == SET + && rtx_equal_p (SET_DEST (pattern), reg) + && REG_P (SET_SRC (pattern))) + { + if (insnS) + FAIL; + insnS = insn; + continue; + } + else + FAIL; + for (ref = DF_REG_USE_CHAIN (REGNO (reg)); + ref; ref = DF_REF_NEXT_REG (ref)) + if (DF_REF_CLASS (ref) != DF_REF_REGULAR) + continue; + else if (prologue_contains (insn = DF_REF_INSN (ref))) + { + insnP = insn; + continue; + } + else if (GET_CODE (pattern = PATTERN (insn)) == SET + && rtx_equal_p (SET_SRC (pattern), reg) + && REG_P (SET_DEST (pattern))) + { + if (insnR) + FAIL; + insnR = insn; + continue; + } + else + FAIL; + if (!insnP || !insnS || !insnR) + FAIL; + SET_DEST (PATTERN (insnS)) = copy_rtx (operands[1]); + df_insn_rescan (insnS); + SET_SRC (PATTERN (insnR)) = copy_rtx (operands[1]); + df_insn_rescan (insnR); + set_insn_deleted (insnP); +})
In the case of the CALL0 ABI, values that must be retained before and after function calls are placed in the callee-saved registers (A12 through A15) and referenced later. However, it is often the case that the save and the reference are each only once and a simple register- register move. e.g. in the following example, if there are no other occurrences of register A14: ;; before ; prologue { ... s32i.n a14, sp, 16 ... ; } prologue ... mov.n a14, a6 ... call0 foo ... mov.n a8, a14 ... ; epilogue { ... l32i.n a14, sp, 16 ... ; } epilogue It can be possible like this: ;; after ; prologue { ... (deleted) ... ; } prologue ... s32i.n a6, sp, 16 ... call0 foo ... l32i.n a8, sp, 16 ... ; epilogue { ... (deleted) ... ; } epilogue This patch introduces a new peephole2 pattern that implements the above. gcc/ChangeLog: * config/xtensa/xtensa.md: New peephole2 pattern that eliminates the use of callee-saved register that saves and restores only once for other register, by using its stack slot directly. --- gcc/config/xtensa/xtensa.md | 58 +++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+)