| Message ID | cfbb27df-1afd-2dbc-ffc5-a5143f6ccd2d@yahoo.co.jp |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] xtensa: Remove TARGET_MEMORY_MOVE_COST hook | expand |
On Sun, Jun 18, 2023 at 12:10 AM Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> wrote: > > This patch adds a new 2-instructions constant synthesis pattern: > > - A non-negative square value that root can fit into a signed 12-bit: > => "MOVI(.N) Ax, simm12" + "MULL Ax, Ax, Ax" > > Due to the execution cost of the integer multiply instruction (MULL), this > synthesis works only when the 32-bit Integer Multiply Option is configured > and optimize for size is specified. > > gcc/ChangeLog: > > * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn): > Add new pattern for the abovementioned case. > --- > gcc/config/xtensa/xtensa.cc | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master.
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 721c99b56a3..dd35e63c094 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -58,6 +58,7 @@ along with GCC; see the file COPYING3. If not see #include "insn-attr.h" #include "tree-pass.h" #include "print-rtl.h" +#include <math.h> /* This file should be included last. */ #include "target-def.h" @@ -1067,7 +1068,7 @@ xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval, { HOST_WIDE_INT imm = INT_MAX; rtx x = NULL_RTX; - int shift; + int shift, sqr; gcc_assert (REG_P (dst)); @@ -1078,7 +1079,6 @@ xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval, x = gen_lshrsi3 (dst, dst, GEN_INT (32 - shift)); } - shift = ctz_hwi (srcval); if ((!x || (TARGET_DENSITY && ! IN_RANGE (imm, -32, 95))) && xtensa_simm12b (srcval >> shift)) @@ -1105,6 +1105,14 @@ xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval, x = gen_addsi3 (dst, dst, GEN_INT (imm1)); } + sqr = (int) floorf (sqrtf (srcval)); + if (TARGET_MUL32 && optimize_size + && !x && IN_RANGE (srcval, 0, (2047 * 2047)) && sqr * sqr == srcval) + { + imm = sqr; + x = gen_mulsi3 (dst, dst, dst); + } + if (!x) return 0;
This patch adds a new 2-instructions constant synthesis pattern: - A non-negative square value that root can fit into a signed 12-bit: => "MOVI(.N) Ax, simm12" + "MULL Ax, Ax, Ax" Due to the execution cost of the integer multiply instruction (MULL), this synthesis works only when the 32-bit Integer Multiply Option is configured and optimize for size is specified. gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn): Add new pattern for the abovementioned case. --- gcc/config/xtensa/xtensa.cc | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)