@@ -7775,7 +7775,7 @@ (define_insn_and_split "*mov<mode>_softfloat"
(const_string "8")
(const_string "16"))])])
-(define_expand "extenddf<mode>2"
+(define_expand "@extenddf<mode>2"
[(set (match_operand:FLOAT128 0 "gpc_reg_operand")
(float_extend:FLOAT128 (match_operand:DF 1 "gpc_reg_operand")))]
"TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128"
@@ -7922,12 +7922,7 @@ (define_expand "floatsi<mode>2"
{
rtx tmp = gen_reg_rtx (DFmode);
expand_float (tmp, op1, false);
- if (<MODE>mode == TFmode)
- emit_insn (gen_extenddftf2 (op0, tmp));
- else if (<MODE>mode == IFmode)
- emit_insn (gen_extenddfif2 (op0, tmp));
- else
- gcc_unreachable ();
+ emit_insn (gen_extenddf2 (<MODE>mode, op0, tmp));
DONE;
}
})