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Thu, 28 Mar 2024 16:05:06 -0700 (PDT) Received: from [172.31.0.109] ([136.36.72.243]) by smtp.gmail.com with ESMTPSA id dk1-20020a4aee81000000b005a5ab89bf3csm213184oob.16.2024.03.28.16.05.06 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Mar 2024 16:05:06 -0700 (PDT) Message-ID: Date: Thu, 28 Mar 2024 17:05:05 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Content-Language: en-US From: Jeff Law To: "gcc-patches@gcc.gnu.org" Subject: [committed] Provide suitable output template for zero_extendqihi2 on H8 X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Segher's recent combine change, quite unexpectedly, triggered a regression on the H8 port. It failed to build newlib. The zero_extendqihi2 pattern provided two alternatives. One where the source and destination matched. That turns into a suitable instruction trivially. The second alternative was actually meant to capture cases where the value is coming from memory. What was missing here was the reg->reg case where the source and destination do not match. That fell into the second case which was requested to be split by the pattern's output template. The splitter had a suitable condition to make sure it only triggered in the right cases. Unfortunately with the pattern requiring a split in a case where the splitter was going to fail led to the fault. So regardless of what's going on in the combiner, this code was just wrong. Fixed thusly by providing a suitable output template for the reg->reg case. Regression tested on h8300-elf. Pushing to the trunk. gcc/ * config/h8300/extensions.md (zero_extendqihi*): Add output template for reg->reg case where the regs don't match. Jeff commit c1e66532cbb424bd7ea8c3b2c1ffea4bb5233309 Author: Jeff Law Date: Thu Mar 28 16:56:53 2024 -0600 [committed] Provide suitable output template for zero_extendqihi2 on H8 Segher's recent combine change, quite unexpectedly, triggered a regression on the H8 port. It failed to build newlib. The zero_extendqihi2 pattern provided two alternatives. One where the source and destination matched. That turns into a suitable instruction trivially. The second alternative was actually meant to capture cases where the value is coming from memory. What was missing here was the reg->reg case where the source and destination do not match. That fell into the second case which was requested to be split by the pattern's output template. The splitter had a suitable condition to make sure it only triggered in the right cases. Unfortunately with the pattern requiring a split in a case where the splitter was going to fail led to the fault. So regardless of what's going on in the combiner, this code was just wrong. Fixed thusly by providing a suitable output template for the reg->reg case. Regression tested on h8300-elf. Pushing to the trunk. gcc/ * config/h8300/extensions.md (zero_extendqihi*): Add output template for reg->reg case where the regs don't match. diff --git a/gcc/config/h8300/extensions.md b/gcc/config/h8300/extensions.md index 7149dc0ac52..a1e8c4abd37 100644 --- a/gcc/config/h8300/extensions.md +++ b/gcc/config/h8300/extensions.md @@ -12,8 +12,8 @@ (define_expand "zero_extendqi2" }) (define_insn_and_split "*zero_extendqihi2" - [(set (match_operand:HI 0 "register_operand" "=r,r") - (zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))] + [(set (match_operand:HI 0 "register_operand" "=r,r,r") + (zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,r,g>")))] "" "#" "&& reload_completed" @@ -21,14 +21,15 @@ (define_insn_and_split "*zero_extendqihi2" (clobber (reg:CC CC_REG))])]) (define_insn "*zero_extendqihi2" - [(set (match_operand:HI 0 "register_operand" "=r,r") - (zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>"))) + [(set (match_operand:HI 0 "register_operand" "=r,r,r") + (zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,r,g>"))) (clobber (reg:CC CC_REG))] "" "@ extu.w %T0 + mov.b\t%X1,%R0\;extu.w\t%T0 #" - [(set_attr "length" "2,10")]) + [(set_attr "length" "2,4,10")]) ;; Split the zero extension of a general operand (actually a memory ;; operand) into a load of the operand and the actual zero extension