diff mbox series

i386: Fix up pr55583.c testcase [PR119465]

Message ID Z+O5eOzRC1lFSzY0@tucnak
State New
Headers show
Series i386: Fix up pr55583.c testcase [PR119465] | expand

Commit Message

Jakub Jelinek March 26, 2025, 8:23 a.m. UTC
Hi!

In r15-4289 H.J. fixed up the pr55583.c testcase to use unsigned long long
or long long instead of unsigned long or long.  That change looks correct to
me because the
void test64r () { b = ((u64)b >> n) | (a << (64 - n)); }
etc. functions otherwise aren't really 64-bit rotates, but something that
triggers UB all the time (at least one of the shifts is out of bounds).
I assume that change fixed the FAILs on -mx32, but it caused
FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shldl?[\\\\t ]*\\\\\$2 1
FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shrdl?[\\\\t ]*\\\\\$2 2
regression on i686-linux (but just for -m32 without defaulting to SSE2 or
what).  The difference is that for say -m32 -march=x86-64 the stv pass
handles some of the rotates in SSE and so we get different sh[rl]dl
instruction counts from the case when SSE isn't enabled and stv pass isn't
done.

The following patch fixes that by disabling SSE for ia32 and always testing
for the same number of instructions.

Bootstrapped/regtested on x86_64-linux and i686-linux and tested with all of
make check-gcc RUNTESTFLAGS='--target_board=unix\{-m32/-march=x86-64,-m32/-march=i686,-mx32,-m64\} i386.exp=pr55583.c'
ok for trunk?

2025-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR target/55583
	PR target/119465
	* gcc.target/i386/pr55583.c: Add -mno-sse -mno-mmx to
	dg-additional-options.  Expect 4 shrdl and 2 shldl instructions on
	ia32.


	Jakub

Comments

Uros Bizjak March 26, 2025, 8:51 a.m. UTC | #1
On Wed, Mar 26, 2025 at 9:23 AM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> In r15-4289 H.J. fixed up the pr55583.c testcase to use unsigned long long
> or long long instead of unsigned long or long.  That change looks correct to
> me because the
> void test64r () { b = ((u64)b >> n) | (a << (64 - n)); }
> etc. functions otherwise aren't really 64-bit rotates, but something that
> triggers UB all the time (at least one of the shifts is out of bounds).
> I assume that change fixed the FAILs on -mx32, but it caused
> FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shldl?[\\\\t ]*\\\\\$2 1
> FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shrdl?[\\\\t ]*\\\\\$2 2
> regression on i686-linux (but just for -m32 without defaulting to SSE2 or
> what).  The difference is that for say -m32 -march=x86-64 the stv pass
> handles some of the rotates in SSE and so we get different sh[rl]dl
> instruction counts from the case when SSE isn't enabled and stv pass isn't
> done.
>
> The following patch fixes that by disabling SSE for ia32 and always testing
> for the same number of instructions.

Yes, in the testsuite we (mostly) assume that ia32 lacks MMX and SSE by default.

> Bootstrapped/regtested on x86_64-linux and i686-linux and tested with all of
> make check-gcc RUNTESTFLAGS='--target_board=unix\{-m32/-march=x86-64,-m32/-march=i686,-mx32,-m64\} i386.exp=pr55583.c'
> ok for trunk?
>
> 2025-03-26  Jakub Jelinek  <jakub@redhat.com>
>
>         PR target/55583
>         PR target/119465
>         * gcc.target/i386/pr55583.c: Add -mno-sse -mno-mmx to
>         dg-additional-options.  Expect 4 shrdl and 2 shldl instructions on
>         ia32.

OK.

Thanks,
Uros.

> --- gcc/testsuite/gcc.target/i386/pr55583.c.jj  2024-10-12 13:47:21.966350407 +0200
> +++ gcc/testsuite/gcc.target/i386/pr55583.c     2025-03-25 16:36:46.320986804 +0100
> @@ -1,9 +1,8 @@
>  /* { dg-do compile  } */
>  /* { dg-options "-O2 -Wno-shift-count-overflow" } */
> -/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 { target { ! ia32 } } } } */
> -/* { dg-final { scan-assembler-times {(?n)shrdl?[\t ]*\$2} 2 { target ia32 } } } */
> -/* { dg-final { scan-assembler-times {(?n)shldl?[\t ]*\$2} 1 { target ia32 } } } */
> -/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 { target { ! ia32 } } } } */
> +/* { dg-additional-options "-mno-sse -mno-mmx" { target ia32 } } */
> +/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 } } */
> +/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 } } */
>
>  typedef unsigned long long u64;
>  typedef unsigned int   u32;
>
>         Jakub
>
diff mbox series

Patch

--- gcc/testsuite/gcc.target/i386/pr55583.c.jj	2024-10-12 13:47:21.966350407 +0200
+++ gcc/testsuite/gcc.target/i386/pr55583.c	2025-03-25 16:36:46.320986804 +0100
@@ -1,9 +1,8 @@ 
 /* { dg-do compile  } */
 /* { dg-options "-O2 -Wno-shift-count-overflow" } */
-/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times {(?n)shrdl?[\t ]*\$2} 2 { target ia32 } } } */
-/* { dg-final { scan-assembler-times {(?n)shldl?[\t ]*\$2} 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 { target { ! ia32 } } } } */
+/* { dg-additional-options "-mno-sse -mno-mmx" { target ia32 } } */
+/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 } } */
+/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 } } */
 
 typedef unsigned long long u64;
 typedef unsigned int   u32;