diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index d971cf90e51..b9b0b2d52d0 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -139,6 +139,17 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
     case ENB_MMA:
       error ("%qs requires the %qs option", name, "-mmma");
       break;
+    case ENB_FUTURE:
+      error ("%qs requires the %qs option", name, "-mcpu=future");
+      break;
+    case ENB_FUTURE_64:
+      error ("%qs requires the %qs option and either the %qs or %qs option",
+	     name, "-mcpu=future", "-m64", "-mpowerpc64");
+      break;
+    case ENB_DM:
+      error ("%qs requires the %qs or %qs options", name, "-mcpu=future",
+	     "-mdense-math");
+      break;
     default:
     case ENB_ALWAYS:
       gcc_unreachable ();
@@ -194,6 +205,12 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
       return TARGET_HTM;
     case ENB_MMA:
       return TARGET_MMA;
+    case ENB_FUTURE:
+      return TARGET_FUTURE;
+    case ENB_FUTURE_64:
+      return TARGET_FUTURE && TARGET_POWERPC64;
+    case ENB_DM:
+      return TARGET_DENSE_MATH;
     default:
       gcc_unreachable ();
     }
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e0d9f5adc97..8b73e994558 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -139,6 +139,8 @@
 ;   endian   Needs special handling for endianness
 ;   ibmld    Restrict usage to the case when TFmode is IBM-128
 ;   ibm128   Restrict usage to the case where __ibm128 is supported or if ibmld
+;   future   Restrict usage to future instructions
+;   dm       Restrict usage to dense math
 ;
 ; Each attribute corresponds to extra processing required when
 ; the built-in is expanded.  All such special processing should
@@ -4108,3 +4110,12 @@
 
   void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
     STXVP nothing {mma,pair}
+
+[future]
+  const signed int __builtin_saturate_subtract32 (signed int, signed int);
+  SAT_SUBSI sat_subsi3 {}
+
+[future-64]
+  const signed long __builtin_saturate_subtract64 (signed long, signed long);
+  SAT_SUBDI sat_subdi3 {}
+
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc
index a2f442ed90d..daf7fff079e 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.cc
+++ b/gcc/config/rs6000/rs6000-gen-builtins.cc
@@ -233,6 +233,9 @@ enum bif_stanza
  BSTZ_P10,
  BSTZ_P10_64,
  BSTZ_MMA,
+ BSTZ_FUTURE,
+ BSTZ_FUTURE_64,
+ BSTZ_DM,
  NUMBIFSTANZAS
 };
 
@@ -266,7 +269,10 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] =
     { "htm",		BSTZ_HTM	},
     { "power10",	BSTZ_P10	},
     { "power10-64",	BSTZ_P10_64	},
-    { "mma",		BSTZ_MMA	}
+    { "mma",		BSTZ_MMA	},
+    { "future",		BSTZ_FUTURE	},
+    { "future-64",	BSTZ_FUTURE_64	},
+    { "dm",		BSTZ_DM		},
   };
 
 static const char *enable_string[NUMBIFSTANZAS] =
@@ -291,7 +297,10 @@ static const char *enable_string[NUMBIFSTANZAS] =
     "ENB_HTM",
     "ENB_P10",
     "ENB_P10_64",
-    "ENB_MMA"
+    "ENB_MMA",
+    "ENB_FUTURE",
+    "ENB_FUTURE_64",
+    "ENB_DM",
   };
 
 /* Function modifiers provide special handling for const, pure, and fpmath
@@ -395,6 +404,8 @@ struct attrinfo
   bool isendian;
   bool isibmld;
   bool isibm128;
+  bool isfuture;
+  bool isdm;
 };
 
 /* Fields associated with a function prototype (bif or overload).  */
@@ -1477,7 +1488,8 @@ parse_bif_attrs (attrinfo *attrptr)
 	"ldvec = %d, stvec = %d, reve = %d, pred = %d, htm = %d, "
 	"htmspr = %d, htmcr = %d, mma = %d, quad = %d, pair = %d, "
 	"mmaint = %d, no32bit = %d, 32bit = %d, cpu = %d, ldstmask = %d, "
-	"lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d.\n",
+	"lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d,",
+	"future = %d, dm = %d.\n",
 	attrptr->isinit, attrptr->isset, attrptr->isextract,
 	attrptr->isnosoft, attrptr->isldvec, attrptr->isstvec,
 	attrptr->isreve, attrptr->ispred, attrptr->ishtm, attrptr->ishtmspr,
@@ -1485,7 +1497,7 @@ parse_bif_attrs (attrinfo *attrptr)
 	attrptr->ismmaint, attrptr->isno32bit, attrptr->is32bit,
 	attrptr->iscpu, attrptr->isldstmask, attrptr->islxvrse,
 	attrptr->islxvrze, attrptr->isendian, attrptr->isibmld,
-	attrptr->isibm128);
+	attrptr->isibm128, attrptr->isfuture, attrptr->isdm);
 #endif
 
   return PC_OK;
@@ -2257,7 +2269,10 @@ write_decls (void)
   fprintf (header_file, "  ENB_HTM,\n");
   fprintf (header_file, "  ENB_P10,\n");
   fprintf (header_file, "  ENB_P10_64,\n");
-  fprintf (header_file, "  ENB_MMA\n");
+  fprintf (header_file, "  ENB_MMA,\n");
+  fprintf (header_file, "  ENB_FUTURE,\n");
+  fprintf (header_file, "  ENB_FUTURE_64,\n");
+  fprintf (header_file, "  ENB_DM\n");
   fprintf (header_file, "};\n\n");
 
   fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
@@ -2301,6 +2316,8 @@ write_decls (void)
   fprintf (header_file, "#define bif_endian_bit\t\t(0x00200000)\n");
   fprintf (header_file, "#define bif_ibmld_bit\t\t(0x00400000)\n");
   fprintf (header_file, "#define bif_ibm128_bit\t\t(0x00800000)\n");
+  fprintf (header_file, "#define bif_future_bit\t\t(0x01000000)\n");
+  fprintf (header_file, "#define bif_dm_bit\t\t(0x02000000)\n");
   fprintf (header_file, "\n");
   fprintf (header_file,
 	   "#define bif_is_init(x)\t\t((x).bifattrs & bif_init_bit)\n");
@@ -2350,6 +2367,10 @@ write_decls (void)
 	   "#define bif_is_ibmld(x)\t((x).bifattrs & bif_ibmld_bit)\n");
   fprintf (header_file,
 	   "#define bif_is_ibm128(x)\t((x).bifattrs & bif_ibm128_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_future(x)\t((x).bifattrs & bif_future_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_dm(x)\t((x).bifattrs & bif_dm_bit)\n");
   fprintf (header_file, "\n");
 
   fprintf (header_file,
@@ -2548,6 +2569,10 @@ write_bif_static_init (void)
 	fprintf (init_file, " | bif_ibmld_bit");
       if (bifp->attrs.isibm128)
 	fprintf (init_file, " | bif_ibm128_bit");
+      if (bifp->attrs.isfuture)
+	fprintf (init_file, " | bif_future_bit");
+      if (bifp->attrs.isdm)
+	fprintf (init_file, " | bif_dm_bit");
       fprintf (init_file, ",\n");
       fprintf (init_file, "      /* restr_opnd */\t{%d, %d, %d},\n",
 	       bifp->proto.restr_opnd[0], bifp->proto.restr_opnd[1],
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ee7651d9b43..f9e231c16be 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -15654,6 +15654,66 @@ (define_insn "hashchk"
 }
   [(set_attr "type" "load")])
 
+;; Signed saturation.
+
+;; The subfus instruction is defined as: SUBFUS RT,L,RA,RB.  The extended
+;; mnemonic that we use (subdus and subwus) has the arguments RA and RB
+;; reversed (so it becomes a subtract instead of subtract from).
+
+(define_insn "sat_sub<mode>3"
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+	(ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
+		      (match_operand:GPR 2 "gpc_reg_operand" "r")))]
+  "TARGET_FUTURE"
+  "sub<wd>us %0,%1,%2"
+  [(set_attr "type" "add")])
+
+(define_insn_and_split "*sat_sub<mode>3_dot"
+  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+	(compare:CC (ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r")
+				  (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
+		    (const_int 0)))
+   (clobber (match_scratch:GPR 0 "=r,r"))]
+  "TARGET_FUTURE"
+  "@
+   sub<wd>us. %0,%1,%2
+   #"
+  "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
+  [(set (match_dup 0)
+	(ss_minus:GPR (match_dup 1)
+		      (match_dup 2)))
+   (set (match_dup 3)
+	(compare:CC (match_dup 0)
+		    (const_int 0)))]
+  ""
+  [(set_attr "type" "add")
+   (set_attr "dot" "yes")
+   (set_attr "length" "4,8")])
+
+(define_insn_and_split "*sat_sub<mode>3_dot2"
+  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+	(compare:CC (ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r")
+				  (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
+		    (const_int 0)))
+   (set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
+	(ss_minus:GPR (match_dup 1)
+		      (match_dup 2)))]
+  "TARGET_FUTURE"
+  "@
+   sub<wd>us. %0,%1,%2
+   #"
+  "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
+  [(set (match_dup 0)
+	(ss_minus:GPR (match_dup 1)
+		      (match_dup 2)))
+   (set (match_dup 3)
+	(compare:CC (match_dup 0)
+		    (const_int 0)))]
+  ""
+  [(set_attr "type" "add")
+   (set_attr "dot" "yes")
+   (set_attr "length" "4,8")])
+
 
 (include "sync.md")
 (include "vector.md")
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 5a026c4b48c..a6d25b5b618 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -17839,6 +17839,7 @@ Disable global interrupt.
 * Basic PowerPC Built-in Functions Available on ISA 2.07::
 * Basic PowerPC Built-in Functions Available on ISA 3.0::
 * Basic PowerPC Built-in Functions Available on ISA 3.1::
+* Basic Built-in Functions that may be available on future PowerPCs::
 @end menu
 
 This section describes PowerPC built-in functions that do not require
@@ -18496,6 +18497,29 @@ ISA 3.1 @code{stxvrbx}, @code{stxvrhx}, @code{stxvrwx}, and @code{stxvrdx}
 instructions.
 @findex vec_xst_trunc
 
+@node Basic Built-in Functions that may be available on future PowerPCs
+@subsubsection Potential future PowerPC Built-in Functions
+
+The built-in functions described in this section may be available on
+future PowerPC processors.  At present, these built-ins exist to
+allowing testing of new instructions.  There is no guarantee that
+these instructions will actually be implemented.
+
+The following built-in functions are available on Linux 64-bit systems
+that use a potential future instruction set (@option{-mcpu=future}):
+
+@table @code
+@item int __builtin_saturate_subtract32 (int, int)
+Subtract the second operand from the first operand.  If the value
+would be less than 0, then the result is 0 instead of the negative
+value of the subtraction.
+
+@item long __builtin_saturate_subtract64 (long, long)
+Subtract the second operand from the first operand.  If the value
+would be less than 0, then the result is 0 instead of the negative
+value of the subtraction.
+@end table
+
 @node PowerPC AltiVec/VSX Built-in Functions
 @subsection PowerPC AltiVec/VSX Built-in Functions
 
diff --git a/gcc/testsuite/gcc.target/powerpc/subfus-1.c b/gcc/testsuite/gcc.target/powerpc/subfus-1.c
new file mode 100644
index 00000000000..535e7f8483d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/subfus-1.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_future_ok } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Test whether the saturating subtract built-in generates subwus for 32-bit
+   subtracts.  */
+
+int do_sat_int  (int  a, int  b)
+{
+  return __builtin_saturate_subtract32 (a, b);		/* subwus  */
+}
+
+int do_sat_int_dot  (int  a, int  b, int  *p)
+{
+  int  r = __builtin_saturate_subtract32 (a, b);	/* subwus.  */
+  if (r == 0)
+    *p = 0;
+
+  return r;
+}
+
+void do_sat_int_dot2  (int  a, int  b, int  *p, int *q)
+{
+  if (__builtin_saturate_subtract32 (a, b))		/* subwus.  */
+    *p = 0;
+
+  *q = a + b;
+  return;
+}
+
+/* { dg-final { scan-assembler     {\msubwus\M} } } */
+/* { dg-final { scan-assembler-not {\msubf\M}   } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/subfus-2.c b/gcc/testsuite/gcc.target/powerpc/subfus-2.c
new file mode 100644
index 00000000000..b68e66dd2b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/subfus-2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile { target lp64 } } */
+/* { dg-require-effective-target powerpc_future_ok } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Test whether the saturating subtract built-in generates subwus for 64-bit
+   subtracts.  */
+
+long do_sat_long  (long  a, long  b)
+{
+  return __builtin_saturate_subtract64 (a, b);		/* subwus  */
+}
+
+long do_sat_long_dot  (long  a, long  b, long  *p)
+{
+  long  r = __builtin_saturate_subtract64 (a, b);	/* subwus.  */
+  if (r == 0)
+    *p = 0;
+
+  return r;
+}
+
+void do_sat_long_dot2  (long  a, long  b, long  *p, long *q)
+{
+  if (__builtin_saturate_subtract64 (a, b))		/* subwus.  */
+    *p = 0;
+
+  *q = a + b;
+  return;
+}
+
+/* { dg-final { scan-assembler     {\msubdus\M} } } */
+/* { dg-final { scan-assembler-not {\msubf\M}   } } */
