diff mbox series

[GCC-10,backport] arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914)

Message ID VI1PR0802MB236807CE997E528ED898C45C9B030@VI1PR0802MB2368.eurprd08.prod.outlook.com
State New
Headers show
Series [GCC-10,backport] arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914) | expand

Commit Message

Srinath Parvathaneni Oct. 16, 2020, 11:45 a.m. UTC 
Hello,

Applied cleanly, Ok for backporting this patch to GCC-10?

__arm_vcvtnq_u32_f32 was missing from arm_mve.h, although the s32_f32 and
[su]16_f16 versions were present.

This patch adds the missing version and testcase, which are
cut-and-paste from the other versions.

2020-10-08  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	PR target/96914
	* config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New.

	gcc/testsuite/
	PR target/96914
	* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: New test.

(cherry picked from commit 5a448362da6133c3b16ffdb0c795b657af7fa5a4)


###############     Attachment also inlined for ease of reply    ###############
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index f0de29477abd9a1474eaaf028aa9a6ea57b58142..6c0d1e2e634a32196eb31079166a7733dcd3a4b6 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -645,6 +645,7 @@
 #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a)
 #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a)
 #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a)
+#define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a)
 #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a)
 #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a)
 #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a)
@@ -16966,6 +16967,13 @@ __arm_vcvtnq_u16_f16 (float16x8_t __a)
   return __builtin_mve_vcvtnq_uv8hi (__a);
 }
 
+__extension__ extern __inline uint32x4_t
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+__arm_vcvtnq_u32_f32 (float32x4_t __a)
+{
+  return __builtin_mve_vcvtnq_uv4si (__a);
+}
+
 __extension__ extern __inline uint16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vcvtmq_u16_f16 (float16x8_t __a)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
new file mode 100644
index 0000000000000000000000000000000000000000..b6d5eb90493143857159995d78f53df8ced0c667
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
@@ -0,0 +1,13 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+uint32x4_t
+foo (float32x4_t a)
+{
+  return vcvtnq_u32_f32 (a);
+}
+
+/* { dg-final { scan-assembler "vcvtn.u32.f32"  }  } */

Comments

Kyrylo Tkachov Oct. 16, 2020, 12:19 p.m. UTC | #1 
> -----Original Message-----
> From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>
> Sent: 16 October 2020 12:45
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
> Subject: [PATCH][GCC-10 backport] arm: [MVE] Add missing
> __arm_vcvtnq_u32_f32 intrinsic (PR 96914)
> 
> Hello,
> 
> Applied cleanly, Ok for backporting this patch to GCC-10?

Ok.
Thanks,
Kyrill

> 
> __arm_vcvtnq_u32_f32 was missing from arm_mve.h, although the s32_f32
> and
> [su]16_f16 versions were present.
> 
> This patch adds the missing version and testcase, which are
> cut-and-paste from the other versions.
> 
> 2020-10-08  Christophe Lyon  <christophe.lyon@linaro.org>
> 
> 	gcc/
> 	PR target/96914
> 	* config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New.
> 
> 	gcc/testsuite/
> 	PR target/96914
> 	* gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: New test.
> 
> (cherry picked from commit 5a448362da6133c3b16ffdb0c795b657af7fa5a4)
> 
> 
> ###############     Attachment also inlined for ease of reply
> ###############
> 
> 
> diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
> index
> f0de29477abd9a1474eaaf028aa9a6ea57b58142..6c0d1e2e634a32196eb310
> 79166a7733dcd3a4b6 100644
> --- a/gcc/config/arm/arm_mve.h
> +++ b/gcc/config/arm/arm_mve.h
> @@ -645,6 +645,7 @@
>  #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a)
>  #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a)
>  #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a)
> +#define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a)
>  #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a)
>  #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a)
>  #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a)
> @@ -16966,6 +16967,13 @@ __arm_vcvtnq_u16_f16 (float16x8_t __a)
>    return __builtin_mve_vcvtnq_uv8hi (__a);
>  }
> 
> +__extension__ extern __inline uint32x4_t
> +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> +__arm_vcvtnq_u32_f32 (float32x4_t __a)
> +{
> +  return __builtin_mve_vcvtnq_uv4si (__a);
> +}
> +
>  __extension__ extern __inline uint16x8_t
>  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
>  __arm_vcvtmq_u16_f16 (float16x8_t __a)
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..b6d5eb904931438571599
> 95d78f53df8ced0c667
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
> @@ -0,0 +1,13 @@
> +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> +/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-additional-options "-O2" } */
> +
> +#include "arm_mve.h"
> +
> +uint32x4_t
> +foo (float32x4_t a)
> +{
> +  return vcvtnq_u32_f32 (a);
> +}
> +
> +/* { dg-final { scan-assembler "vcvtn.u32.f32"  }  } */
diff mbox series

Patch

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index f0de29477abd9a1474eaaf028aa9a6ea57b58142..6c0d1e2e634a32196eb31079166a7733dcd3a4b6 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -645,6 +645,7 @@ 
 #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a)
 #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a)
 #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a)
+#define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a)
 #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a)
 #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a)
 #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a)
@@ -16966,6 +16967,13 @@  __arm_vcvtnq_u16_f16 (float16x8_t __a)
   return __builtin_mve_vcvtnq_uv8hi (__a);
 }
 
+__extension__ extern __inline uint32x4_t
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+__arm_vcvtnq_u32_f32 (float32x4_t __a)
+{
+  return __builtin_mve_vcvtnq_uv4si (__a);
+}
+
 __extension__ extern __inline uint16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vcvtmq_u16_f16 (float16x8_t __a)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
new file mode 100644
index 0000000000000000000000000000000000000000..b6d5eb90493143857159995d78f53df8ced0c667
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c
@@ -0,0 +1,13 @@ 
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+uint32x4_t
+foo (float32x4_t a)
+{
+  return vcvtnq_u32_f32 (a);
+}
+
+/* { dg-final { scan-assembler "vcvtn.u32.f32"  }  } */