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Disable accumulate-outgoing-args for Generic and Buldozers

Message ID CAMe9rOqr-DcBubgvfkao7EsJA22gH3uxVSMp0=LEWbVrA3CLvw@mail.gmail.com
State New
Headers show

Commit Message

H.J. Lu Jan. 24, 2014, 3:41 a.m. UTC 
On Thu, Jan 23, 2014 at 4:54 PM, Jan Hubicka <hubicka@ucw.cz> wrote:
>> This piece code is wrong for x32:
>>
>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59929
>
> Though an independent bug ;)
>>
>> I am testing:
>>
>> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
>> index ddc3be6..92e8fd0 100644
>> --- a/gcc/config/i386/i386.md
>> +++ b/gcc/config/i386/i386.md
>> @@ -2765,7 +2765,20 @@
>>    "reload_completed"
>>    [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
>>     (set (mem:SF (reg:P SP_REG)) (match_dup 1))]
>> -  "operands[2] = GEN_INT (-<P:MODE_SIZE>);")
>> +{
>> +  rtx op = XEXP (operands[0], 0);
>> +  if (GET_CODE (op) == PRE_DEC)
>> +    {
>> +      gcc_assert (!TARGET_64BIT);
>> +      op = GEN_INT (-4);
>> +    }
>> +  else
>> +    {
>> +      op = XEXP (XEXP (op, 1), 1);
>> +      gcc_assert (CONST_INT_P (op));
>> +    }
>> +  operands[2] = op;
>> +})
>
> Not pretty, but I can not think of much more compact way, so OK
> if it passes.
>>
>>  (define_split
>>    [(set (match_operand:SF 0 "push_operand")
>

This is the patch I checked in.  I will backport it to 4.8 branch
after a few days.

Thanks.
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Patch

Index: ChangeLog
===================================================================
--- ChangeLog    (revision 207022)
+++ ChangeLog    (working copy)
@@ -1,3 +1,9 @@ 
+2014-01-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+    PR target/59929
+    * config/i386/i386.md (pushsf splitter): Get stack adjustment
+    from push operand if code of push isn't PRE_DEC.
+
 2014-01-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

     PR target/59909
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog    (revision 207022)
+++ testsuite/ChangeLog    (working copy)
@@ -1,3 +1,8 @@ 
+2014-01-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+    PR target/59929
+    * gcc.target/i386/pr59929.c: New test.
+
 2014-01-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

     PR target/59909
Index: testsuite/gcc.target/i386/pr59929.c
===================================================================
--- testsuite/gcc.target/i386/pr59929.c    (revision 0)
+++ testsuite/gcc.target/i386/pr59929.c    (revision 207023)
@@ -0,0 +1,55 @@ 
+/* { dg-do run } */
+/* { dg-options "-O0 -mno-accumulate-outgoing-args" } */
+/* { dg-options "-O0 -mno-accumulate-outgoing-args -mx32
-maddress-mode=short" { target x32 } } */
+
+void
+__attribute__ ((noinline))
+test (float x1, float x2, float x3, float x4, float x5, float x6,
+      float x7, float x8, float x9, float x10, float x11, float x12,
+      float x13, float x14, float x15, float x16)
+{
+  if (x1 != 91
+      || x2 != 92
+      || x3 != 93
+      || x4 != 94
+      || x5 != 95
+      || x6 != 96
+      || x7 != 97
+      || x8 != 98
+      || x9 != 99
+      || x10 != 100
+      || x11 != 101
+      || x12 != 102
+      || x13 != 103
+      || x14 != 104
+      || x15 != 105
+      || x16 != 106)
+    __builtin_abort ();
+}
+
+float x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,
+      x14, x15, x16;
+
+int
+main ()
+{
+  x1 = 91;
+  x2 = 92;
+  x3 = 93;
+  x4 = 94;
+  x5 = 95;
+  x6 = 96;
+  x7 = 97;
+  x8 = 98;
+  x9 = 99;
+  x10 = 100;
+  x11 = 101;
+  x12 = 102;
+  x13 = 103;
+  x14 = 104;
+  x15 = 105;
+  x16 = 106;
+  test (x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13,
+    x14, x15, x16);
+  return 0;
+}
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md    (revision 207022)
+++ config/i386/i386.md    (working copy)
@@ -2765,7 +2765,20 @@ 
   "reload_completed"
   [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
    (set (mem:SF (reg:P SP_REG)) (match_dup 1))]
-  "operands[2] = GEN_INT (-<P:MODE_SIZE>);")
+{
+  rtx op = XEXP (operands[0], 0);
+  if (GET_CODE (op) == PRE_DEC)
+    {
+      gcc_assert (!TARGET_64BIT);
+      op = GEN_INT (-4);
+    }
+  else
+    {
+      op = XEXP (XEXP (op, 1), 1);
+      gcc_assert (CONST_INT_P (op));
+    }
+  operands[2] = op;
+})

 (define_split
   [(set (match_operand:SF 0 "push_operand")