From patchwork Tue Dec 24 20:13:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 305055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AF0362C00BA for ; Wed, 25 Dec 2013 07:13:20 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=BMaq8hErS9hE1NJpz8 4fNT+vQVzMm7YvWQ14ctYmgdEjPJT/fUwUUXCCNiwgqmdJvSF3F7z3X190Q11vYV dCRrTaNNdpjn4Cjnf/dpZubu57sZ1VvSbKEVwNfyKA/1bCEzjCTSRD2jyz/nn72m crvRB9T94sTje5jImlhCva3VI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=9CMMojjYbNZqrY6aFCmYEqug B8U=; b=crr7+WoW+1xw1DIStrA3/3II5FlFH4oWOXgmQMnjs/6Rw0dxg2aeiNfe Il1oJ1F247/FjNUj5U7JNKzrFK7e2sGxOU2TM/P2M3rk990l09pua3mLTRPr6klH gNDhi0XHhP5o+Svfa4rlymHQg2cZ0p2GfO86WGTYU1IApeSXI6M= Received: (qmail 1630 invoked by alias); 24 Dec 2013 20:13:13 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 1618 invoked by uid 89); 24 Dec 2013 20:13:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f178.google.com Received: from mail-ob0-f178.google.com (HELO mail-ob0-f178.google.com) (209.85.214.178) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 24 Dec 2013 20:13:10 +0000 Received: by mail-ob0-f178.google.com with SMTP id uz6so7075564obc.9 for ; Tue, 24 Dec 2013 12:13:08 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.182.103.133 with SMTP id fw5mr2988021obb.43.1387915988313; Tue, 24 Dec 2013 12:13:08 -0800 (PST) Received: by 10.76.105.174 with HTTP; Tue, 24 Dec 2013 12:13:08 -0800 (PST) In-Reply-To: References: <20131205182254.GA17941@intel.com> <52A0E9E0.5070508@gmail.com> Date: Tue, 24 Dec 2013 12:13:08 -0800 Message-ID: Subject: Re: [PATCH] Add -mtune=ia support From: "H.J. Lu" To: Uros Bizjak Cc: Richard Biener , Patrick Marlier , GCC Patches X-IsSubscribed: yes On Fri, Dec 6, 2013 at 9:38 AM, H.J. Lu wrote: > On Fri, Dec 6, 2013 at 2:44 AM, Uros Bizjak wrote: >> On Fri, Dec 6, 2013 at 10:38 AM, Richard Biener >> wrote: >>> On Thu, Dec 5, 2013 at 10:05 PM, H.J. Lu wrote: >>>> On Thu, Dec 5, 2013 at 1:02 PM, Patrick Marlier >>>> wrote: >>>>> Hi, >>>>> >>>>> >>>>> On 12/05/2013 07:22 PM, H.J. Lu wrote: >>>>>> >>>>>> We'd like to add a new -mtune=ia option for x86 to optimize for both >>>>>> Haswell and Silvermont. Currently, -mtune=ia is aliased to -mtune=slm. >>>>>> We will improve it further for Haswell and Silvermont. Later, we will >>>>>> update it to future Intel processors. >>>>> >>>>> >>>>> At first, 'ia' means to me Itanium, ie IA-64. I would personally prefer >>>>> another name but maybe I am the only one to think that. >>>>> >>>> >>>> "ia" stands for Intel Architecture. It is the natural name for >>>> this option. >>> >>> I think "ia" and the natural "aa" are too obfuscated. Why didn't you >>> chose simply "intel" here? (will the next patch add -mtune=a as >>> that's natural for "AMD"?) >> >> -mtune=intel indeed sounds better. >> > > This is the patch I checked in. > > Thanks. > > -- > H.J. > -- > 2013-12-06 H.J. Lu > > * config.gcc: Change --with-cpu=ia to --with-cpu=intel. > > * config/i386/i386.c (cpu_names): Replace "ia" with "intel". > (processor_alias_table): Likewise. > (ix86_option_override_internal): Likewise. > * config/i386/i386.h (target_cpu_default): Replace > TARGET_CPU_DEFAULT_ia with TARGET_CPU_DEFAULT_intel. > > * doc/invoke.texi: Replace -mtune=ia with -mtune=intel. > @@ -3632,8 +3632,8 @@ ix86_option_override_internal (bool main_args_p, > if (!strcmp (opts->x_ix86_arch_string, "generic")) > error ("generic CPU can be used only for %stune=%s %s", > prefix, suffix, sw); > - else if (!strcmp (ix86_arch_string, "ia")) > - error ("ia CPU can be used only for %stune=%s %s", > + else if (!strcmp (ix86_arch_string, "intel")) > + error ("intel CPU can be used only for %stune=%s %s", > prefix, suffix, sw); > else if (!strncmp (opts->x_ix86_arch_string, "generic", 7) || i == pta_size) > error ("bad value (%s) for %sarch=%s %s", There is a typo. I should check opts->x_ix86_arch_string, not ix86_arch_string. I am checking in this patch as obvious fix. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e9214a..8c756a6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-12-24 H.J. Lu + + * config/i386/i386.c (ix86_option_override_internal): Check + opts->x_ix86_arch_string instead of ix86_arch_string. + 2013-12-24 Renlin Li * config/arm/arm-protos.h (vfp_const_double_for_bits): Declare. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ced6618..f5d9ce5 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3645,7 +3645,7 @@ ix86_option_override_internal (bool main_args_p, if (!strcmp (opts->x_ix86_arch_string, "generic")) error ("generic CPU can be used only for %stune=%s %s", prefix, suffix, sw); - else if (!strcmp (ix86_arch_string, "intel")) + else if (!strcmp (opts->x_ix86_arch_string, "intel")) error ("intel CPU can be used only for %stune=%s %s", prefix, suffix, sw); else if (!strncmp (opts->x_ix86_arch_string, "generic", 7) || i == pta_size)