From patchwork Thu Apr 22 10:10:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongtao Liu X-Patchwork-Id: 1469136 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=aDgWBeSc; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FQtNb4Vg8z9sV5 for ; Thu, 22 Apr 2021 20:06:06 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 57DCD3A0706A; Thu, 22 Apr 2021 10:06:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 57DCD3A0706A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619085963; bh=VfacMwLBmBrJ3a53nK6wz1O7BmoN0O0H+DvEYP0ecBQ=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=aDgWBeScCDNik7AO05eMrdP+7TfKvVpn83pK+/V22U2LoDouJSBFU9VpbHCBfnAAB +tvbSdxO30X/A9asE5cbDFi8DVVoIHUYOTS5PEqKRRxnHMnmhTVea5m/2q7sKI8f5s fKZrYKVyj749Gr7KOboMSTxfw50IlrZZpqHOgw2M= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-vk1-xa34.google.com (mail-vk1-xa34.google.com [IPv6:2607:f8b0:4864:20::a34]) by sourceware.org (Postfix) with ESMTPS id 9FAF73894416 for ; Thu, 22 Apr 2021 10:05:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 9FAF73894416 Received: by mail-vk1-xa34.google.com with SMTP id o17so9718715vko.8 for ; Thu, 22 Apr 2021 03:05:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=VfacMwLBmBrJ3a53nK6wz1O7BmoN0O0H+DvEYP0ecBQ=; b=ZCLTbLXaF9ZesTuDNlhTQLkVqD9ImVKmdkE0+So8KTWBQZEUxNucRF+r9GGpJ4JEIm Kw/R9x0jQ5UJOY2lERUkl64J1eEqY/Fhs0qYUyVSd8cewab2kwBbff3ZVmDovfrNPclK TD3VNcMiva2LGF5lAy3+g2MvzjYwre/YP3jvFNHLJGr92V1q/oEoqA43Xezty4aU6Lv4 LYiwuixxSrRsoV4hq08CQypvIIzsKx9BnDvPbIk1ICvY7sDFqpx8+VfJMwQWJV+YyQ8D sscqZwJKQGNZXSIAcMYSu35RO4xCphvWfPWeahXfDuoyLc7WOY5PHq4O65VFFYWwo+iR Unag== X-Gm-Message-State: AOAM53090PF+ek5YRvlfoazpYOLc/2lDiBv4ESrFr3bfpwSPbqPWXw0H 0vO/PK8WeP08p7CrHit1ZJf9Pa9yp3SaVmfrbP0= X-Google-Smtp-Source: ABdhPJx3E0K9yXFXVvrgPmgRFczkpTNqsuLlpm6vSCXzqhKf5U9bjy/YVsqvLkVwTn84yq+3JJU+bX9hJ1ryEAHb4wE= X-Received: by 2002:a1f:45c7:: with SMTP id s190mr1942703vka.24.1619085958865; Thu, 22 Apr 2021 03:05:58 -0700 (PDT) MIME-Version: 1.0 Date: Thu, 22 Apr 2021 18:10:06 +0800 Message-ID: Subject: [PATCH] [i386] MASK_AVX256_SPLIT_UNALIGNED_STORE/LOAD should be cleared in opts->x_target_flags when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled by target attribute. To: Uros Bizjak , GCC Patches X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hongtao Liu via Gcc-patches From: Hongtao Liu Reply-To: Hongtao Liu Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi: Bootstrapped and regtested on x86-64_iinux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/100093 * config/i386/i386-options.c (ix86_option_override_internal): Clear MASK_AVX256_SPLIT_UNALIGNED_LOAD/STORE in x_target_flags when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled by target attribute. gcc/testsuite/ChangeLog: PR target/100093 * gcc.target/i386/pr100093.c: New test. From 6944526e088df6c4ef73ab797ee90f99c0ad566a Mon Sep 17 00:00:00 2001 From: liuhongt Date: Fri, 16 Apr 2021 11:29:10 +0800 Subject: [PATCH] [i386] MASK_AVX256_SPLIT_UNALIGNED_STORE/LOAD should be cleared in opts->x_target_flags when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled by target attribute. gcc/ChangeLog: PR target/100093 * config/i386/i386-options.c (ix86_option_override_internal): Clear MASK_AVX256_SPLIT_UNALIGNED_LOAD/STORE in x_target_flags when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled by target attribute. gcc/testsuite/ChangeLog: PR target/100093 * gcc.target/i386/pr100093.c: New test. --- gcc/config/i386/i386-options.c | 7 +++++++ gcc/testsuite/gcc.target/i386/pr100093.c | 12 ++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr100093.c diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c index 91da2849c49..ba5f275e1e3 100644 --- a/gcc/config/i386/i386-options.c +++ b/gcc/config/i386/i386-options.c @@ -2853,9 +2853,16 @@ ix86_option_override_internal (bool main_args_p, if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD; + else if (!main_args_p + && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]) + opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_LOAD; + if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE; + else if (!main_args_p + && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]) + opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_STORE; /* Enable 128-bit AVX instruction generation for the auto-vectorizer. */ diff --git a/gcc/testsuite/gcc.target/i386/pr100093.c b/gcc/testsuite/gcc.target/i386/pr100093.c new file mode 100644 index 00000000000..f32a4bc8f2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr100093.c @@ -0,0 +1,12 @@ +/* PR target/100093 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=znver1" } */ +/* { dg-final { scan-assembler-not "vextractf128" } } */ + +__attribute__((target("tune=skylake-avx512"))) +void fill_avx2(double *__restrict__ data, int n, double value) +{ + for (int i = 0; i < n * 16; i++) { + data[i] = value; + } +} -- 2.18.1