From patchwork Tue May 5 16:04:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1283733 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=IJoljWpA; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Gl1g52fVz9sNH for ; Wed, 6 May 2020 02:05:26 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 490F9389001F; Tue, 5 May 2020 16:05:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 490F9389001F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1588694723; bh=psfnrGIJM+ZDxAQgoVuvC62AEBcSDqNTcfLoanPvAe0=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=IJoljWpAa/3eVssRkez9DLWuKSX66fVZYETpJ+UsiI9w4vf7LBIpbAS/EtUpjuEQP ua+rFSDlUX+WHMlMjMgfdo1nnefdY1HSpLoEgGHGpdI1FvTVlFOFEGppKmEXefkOwe /RwMs4fOAP+gEVIDUIAwCAUN6AOku6gajcD4fgZg= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd29.google.com (mail-io1-xd29.google.com [IPv6:2607:f8b0:4864:20::d29]) by sourceware.org (Postfix) with ESMTPS id 73232388F400 for ; Tue, 5 May 2020 16:05:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 73232388F400 Received: by mail-io1-xd29.google.com with SMTP id w11so1934683iov.8 for ; Tue, 05 May 2020 09:05:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=psfnrGIJM+ZDxAQgoVuvC62AEBcSDqNTcfLoanPvAe0=; b=HGiWN4rHCfR5a4zxfVZirmPDRRUptrL0KxgIFvOW/910zffgOgh4WP//s/YucyhjA8 AZoMebSbuW7tZQvzbwJtwLsGTq8+Hx/tIAuh2iKe+cunxJomoj/rZbSdNp8siVqbX1/E NMaMCev/Vhlh3+wKHAb2/kQ1NQP+TjxzLEemmc+mxpWSYZocJn7QTiun9rYfaiWllRou PJ90oB1Md4i/mVVHiPqPrzRkw9xG90a53T9wdP6+ARpfT+ezxrp+U5lYgG48jugR0yqz DtIqYwHW74Bpvq1poG2zm2X2uSmYXzDzu+fl/l679Wbu9KF7VPh22GK+XHYM2pKzn2BX iZRw== X-Gm-Message-State: AGi0Pua1dmbRZir73M2mhy6unrWeX1wfrz7Jl4wzIGFMxC6LMwkpupcY cSVUd0vDN1GFblJoe9lMW7g08O13/mfZnRVIZvPs9/YUcd0= X-Google-Smtp-Source: APiQypIIwzvlN1Of//cJOCywKPlL/CRBeNmaj0JM2jZYeJBB/YuHiFoHUyX/IDK/wEhk4M/1Hvm/zR2Rt+2+59aV02U= X-Received: by 2002:a02:c998:: with SMTP id b24mr4187576jap.23.1588694710747; Tue, 05 May 2020 09:05:10 -0700 (PDT) MIME-Version: 1.0 Date: Tue, 5 May 2020 18:04:59 +0200 Message-ID: Subject: [committed] i386: Use "clobber (scratch)" in expanders To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Use "clobber (scratch:M)" instad of "clobber (match_scratch:M N)" in expanders. 2020-05-05 Uroš Bizjak * config/i386/i386.md (fixuns_truncsi2): Use "clobber (scratch:M)" instad of "clobber (match_scratch:M N)". (addqi3_cconly_overflow): Ditto. (umulv4): Ditto. (mul3_highpart): Ditto. (tls_global_dynamic_32): Ditto. (tls_local_dynamic_base_32): Ditto. (atanxf2): Ditto. (asinxf2): Ditto. (acosxf2): Ditto. (logxf2): Ditto. (log10xf2): Ditto. (log2xf2): Ditto. (*adddi_4): Remove "m" constraint from scratch operand. (*add_4): Ditto. No functional changes. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5cad481fd9f..898bb946a2d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4591,8 +4591,8 @@ (unsigned_fix:SI (match_operand:MODEF 1 "nonimmediate_operand"))) (use (match_dup 2)) - (clobber (match_scratch: 3)) - (clobber (match_scratch: 4))])] + (clobber (scratch:)) + (clobber (scratch:))])] "(!TARGET_64BIT || TARGET_AVX512F) && TARGET_SSE2 && TARGET_SSE_MATH" { machine_mode mode = mode; @@ -5660,7 +5660,7 @@ (compare (match_operand:DI 1 "nonimmediate_operand" "0") (match_operand:DI 2 "x86_64_immediate_operand" "e"))) - (clobber (match_scratch:DI 0 "=rm"))] + (clobber (match_scratch:DI 0 "=r"))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGCmode)" { @@ -5705,7 +5705,7 @@ (compare (match_operand:SWI124 1 "nonimmediate_operand" "0") (match_operand:SWI124 2 "const_int_operand" "n"))) - (clobber (match_scratch:SWI124 0 "=m"))] + (clobber (match_scratch:SWI124 0 "="))] "ix86_match_ccmode (insn, CCGCmode)" { switch (get_attr_type (insn)) @@ -6955,7 +6955,7 @@ (match_operand:QI 0 "nonimmediate_operand") (match_operand:QI 1 "general_operand")) (match_dup 0))) - (clobber (match_scratch:QI 2))])] + (clobber (scratch:QI))])] "!(MEM_P (operands[0]) && MEM_P (operands[1]))") (define_insn "*add3_cconly_overflow_1" @@ -7591,7 +7591,7 @@ (mult:SWI248 (match_dup 1) (match_dup 2))))) (set (match_operand:SWI248 0 "register_operand") (mult:SWI248 (match_dup 1) (match_dup 2))) - (clobber (match_scratch:SWI248 4))]) + (clobber (scratch:SWI248))]) (set (pc) (if_then_else (eq (reg:CCO FLAGS_REG) (const_int 0)) (label_ref (match_operand 3)) @@ -7810,7 +7810,7 @@ (any_extend: (match_operand:DWIH 2 "register_operand"))) (match_dup 3)))) - (clobber (match_scratch:DWIH 4)) + (clobber (scratch:DWIH)) (clobber (reg:CC FLAGS_REG))])] "" "operands[3] = GEN_INT (GET_MODE_BITSIZE (mode));") @@ -14825,8 +14825,8 @@ (match_operand 3 "constant_call_address_operand") (reg:SI SP_REG)] UNSPEC_TLS_GD)) - (clobber (match_scratch:SI 4)) - (clobber (match_scratch:SI 5)) + (clobber (scratch:SI)) + (clobber (scratch:SI)) (clobber (reg:CC FLAGS_REG))])] "" "ix86_tls_descriptor_calls_expanded_in_cfun = true;") @@ -14942,8 +14942,8 @@ (match_operand 2 "constant_call_address_operand") (reg:SI SP_REG)] UNSPEC_TLS_LD_BASE)) - (clobber (match_scratch:SI 3)) - (clobber (match_scratch:SI 4)) + (clobber (scratch:SI)) + (clobber (scratch:SI)) (clobber (reg:CC FLAGS_REG))])] "" "ix86_tls_descriptor_calls_expanded_in_cfun = true;") @@ -15979,7 +15979,7 @@ (unspec:XF [(match_dup 2) (match_operand:XF 1 "register_operand")] UNSPEC_FPATAN)) - (clobber (match_scratch:XF 3))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" "operands[2] = force_reg (XFmode, CONST1_RTX (XFmode));") @@ -16008,9 +16008,9 @@ (set (match_dup 4) (minus:XF (match_dup 3) (match_dup 2))) (set (match_dup 5) (sqrt:XF (match_dup 4))) (parallel [(set (match_operand:XF 0 "register_operand") - (unspec:XF [(match_dup 5) (match_dup 1)] + (unspec:XF [(match_dup 5) (match_dup 1)] UNSPEC_FPATAN)) - (clobber (match_scratch:XF 6))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" { @@ -16046,9 +16046,9 @@ (set (match_dup 4) (minus:XF (match_dup 3) (match_dup 2))) (set (match_dup 5) (sqrt:XF (match_dup 4))) (parallel [(set (match_operand:XF 0 "register_operand") - (unspec:XF [(match_dup 1) (match_dup 5)] + (unspec:XF [(match_dup 1) (match_dup 5)] UNSPEC_FPATAN)) - (clobber (match_scratch:XF 6))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" { @@ -16260,7 +16260,7 @@ [(parallel [(set (match_operand:XF 0 "register_operand") (unspec:XF [(match_operand:XF 1 "register_operand") (match_dup 2)] UNSPEC_FYL2X)) - (clobber (match_scratch:XF 3))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" { @@ -16289,7 +16289,7 @@ [(parallel [(set (match_operand:XF 0 "register_operand") (unspec:XF [(match_operand:XF 1 "register_operand") (match_dup 2)] UNSPEC_FYL2X)) - (clobber (match_scratch:XF 3))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" { @@ -16318,7 +16318,7 @@ [(parallel [(set (match_operand:XF 0 "register_operand") (unspec:XF [(match_operand:XF 1 "register_operand") (match_dup 2)] UNSPEC_FYL2X)) - (clobber (match_scratch:XF 3))])] + (clobber (scratch:XF))])] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" "operands[2] = force_reg (XFmode, CONST1_RTX (XFmode));")