diff mbox series

i386: Relax extract location operand mode requirements

Message ID CAFULd4bBUsXh5atfAo=pYB7vafnqZ00tN81KG+32B0KBVy_qTQ@mail.gmail.com
State New
Headers show
Series i386: Relax extract location operand mode requirements | expand

Commit Message

Uros Bizjak Feb. 15, 2023, 8:37 p.m. UTC 
There is no requirement on the mode of the location operand, so any
supported integer mode is valid.  We can relax extract location
operand mode requirement of other patterns involving zero_extract RTX.

2023-02-15  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:

    * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
    int248_register_operand predicate in zero_extract sub-RTX.
    (*cmpqi_ext<mode>_2): Ditto.
    (*cmpqi_ext<mode>_3): Ditto.
    (*cmpqi_ext<mode>_4): Ditto.
    (*extzvqi_mem_rex64): Ditto.
    (*extzvqi): Ditto.
    (*insvqi_1_mem_rex64): Ditto.
    (@insv<mode>_1): Ditto.
    (*insvqi_1): Ditto.
    (*insvqi_2): Ditto.
    (*insvqi_3): Ditto.
    (*extendqi<SWI24:mode>_ext_1): Ditto.
    (*addqi_ext<mode>_1): Ditto.
    (*addqi_ext<mode>_2): Ditto.
    (*subqi_ext<mode>_2): Ditto.
    (*testqi_ext<mode>_1): Ditto.
    (*testqi_ext<mode>_2): Ditto.
    (*andqi_ext<mode>_1): Ditto.
    (*andqi_ext<mode>_1_cc): Ditto.
    (*andqi_ext<mode>_2): Ditto.
    (*<any_or:code>qi_ext<mode>_1): Ditto.
    (*<any_or:code>qi_ext<mode>_2): Ditto.
    (*xorqi_ext<mode>_1_cc): Ditto.
    (*negqi_ext<mode>_2): Ditto.
    (*ashlqi_ext<mode>_2): Ditto.
    (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Pushed to master.

Uros.
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e37bc8dca53..198f06e0769 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1459,7 +1459,7 @@ 
 	  (match_operand:QI 0 "nonimmediate_operand" "QBc,m")
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 1 "register_operand" "Q,Q")
+	      (match_operand 1 "int248_register_operand" "Q,Q")
 	      (const_int 8)
 	      (const_int 8)) 0)))]
   "ix86_match_ccmode (insn, CCmode)"
@@ -1473,7 +1473,7 @@ 
 	(compare
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 0 "register_operand" "Q")
+	      (match_operand 0 "int248_register_operand" "Q")
 	      (const_int 8)
 	      (const_int 8)) 0)
 	  (match_operand:QI 1 "const0_operand")))]
@@ -1498,7 +1498,7 @@ 
 	(compare
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 0 "register_operand" "Q,Q")
+	      (match_operand 0 "int248_register_operand" "Q,Q")
 	      (const_int 8)
 	      (const_int 8)) 0)
 	  (match_operand:QI 1 "general_operand" "QnBc,m")))]
@@ -1513,12 +1513,12 @@ 
 	(compare
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 0 "register_operand" "Q")
+	      (match_operand 0 "int248_register_operand" "Q")
 	      (const_int 8)
 	      (const_int 8)) 0)
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 1 "register_operand" "Q")
+	      (match_operand 1 "int248_register_operand" "Q")
 	      (const_int 8)
 	      (const_int 8)) 0)))]
   "ix86_match_ccmode (insn, CCmode)"
@@ -3192,7 +3192,7 @@ 
   [(set (match_operand:QI 0 "norex_memory_operand" "=Bn")
 	(subreg:QI
 	  (zero_extract:SWI248
-	    (match_operand:SWI248 1 "register_operand" "Q")
+	    (match_operand 1 "int248_register_operand" "Q")
 	    (const_int 8)
 	    (const_int 8)) 0))]
   "TARGET_64BIT && reload_completed"
@@ -3214,7 +3214,7 @@ 
   [(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m")
 	(subreg:QI
 	  (zero_extract:SWI248
-	    (match_operand:SWI248 1 "register_operand" "Q,Q,Q")
+	    (match_operand 1 "int248_register_operand" "Q,Q,Q")
 	    (const_int 8)
 	    (const_int 8)) 0))]
   ""
@@ -3242,7 +3242,7 @@ 
 (define_peephole2
   [(set (match_operand:QI 0 "register_operand")
 	(subreg:QI
-	  (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand")
+	  (zero_extract:SWI248 (match_operand 1 "int248_register_operand")
 			       (const_int 8)
 			       (const_int 8)) 0))
    (set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))]
@@ -3289,7 +3289,7 @@ 
 
 (define_insn "*insvqi_1_mem_rex64"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
@@ -3301,7 +3301,7 @@ 
 
 (define_insn "@insv<mode>_1"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(match_operand:SWI248 1 "general_operand" "QnBc,m"))]
@@ -3317,7 +3317,7 @@ 
 
 (define_insn "*insvqi_1"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
@@ -3331,7 +3331,7 @@ 
 (define_peephole2
   [(set (match_operand:QI 0 "register_operand")
 	(match_operand:QI 1 "norex_memory_operand"))
-   (set (zero_extract:SWI248 (match_operand:SWI248 2 "register_operand")
+   (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
 			     (const_int 8)
 			     (const_int 8))
 	(subreg:SWI248 (match_dup 0) 0))]
@@ -3347,7 +3347,7 @@ 
   [(parallel [(set (match_operand:SWI48 0 "general_reg_operand")
 		   (const_int 0))
 	      (clobber (reg:CC FLAGS_REG))])
-   (set (zero_extract:SWI248 (match_operand:SWI248 1 "general_reg_operand")
+   (set (zero_extract:SWI248 (match_operand 1 "int248_register_operand")
 			     (const_int 8)
 			     (const_int 8))
 	(const_int 0))]
@@ -3360,7 +3360,7 @@ 
 (define_peephole2
   [(set (match_operand:SWI48 0 "general_reg_operand")
 	(match_operand:SWI48 1 "const_int_operand"))
-   (set (zero_extract:SWI248 (match_operand:SWI248 2 "general_reg_operand")
+   (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
 			     (const_int 8)
 			     (const_int 8))
 	(match_operand:SWI248 3 "const_int_operand"))]
@@ -3378,11 +3378,11 @@ 
 
 (define_insn "*insvqi_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(any_extract:SWI248
-	  (match_operand:SWI248 1 "register_operand" "Q")
+	  (match_operand 1 "int248_register_operand" "Q")
 	  (const_int 8)
 	  (const_int 8)))]
   ""
@@ -3392,7 +3392,7 @@ 
 
 (define_insn "*insvqi_3"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(any_shiftrt:SWI248
@@ -4783,7 +4783,7 @@ 
 	(sign_extend:SWI24
 	  (subreg:QI
 	    (zero_extract:SWI248
-	      (match_operand:SWI248 1 "register_operand" "Q")
+	      (match_operand 1 "int248_register_operand" "Q")
 	      (const_int 8)
 	      (const_int 8)) 0)))]
   ""
@@ -6657,14 +6657,14 @@ 
 
 (define_insn "*addqi_ext<mode>_1"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (plus:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0,0")
+	        (match_operand 1 "int248_register_operand" "0,0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "general_operand" "QnBc,m")) 0))
@@ -6696,19 +6696,19 @@ 
 
 (define_insn "*addqi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (plus:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "%0")
+	        (match_operand 1 "int248_register_operand" "%0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 2 "register_operand" "Q")
+	        (match_operand 2 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0)) 0))
   (clobber (reg:CC FLAGS_REG))]
@@ -7267,19 +7267,19 @@ 
 
 (define_insn "*subqi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (minus:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0")
+	        (match_operand 1 "int248_register_operand" "0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 2 "register_operand" "Q")
+	        (match_operand 2 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0)) 0))
   (clobber (reg:CC FLAGS_REG))]
@@ -9866,7 +9866,7 @@ 
 	  (and:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 0 "register_operand" "Q,Q")
+	        (match_operand 0 "int248_register_operand" "Q,Q")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 1 "general_operand" "QnBc,m"))
@@ -9883,12 +9883,12 @@ 
 	  (and:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 0 "register_operand" "Q")
+	        (match_operand 0 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "Q")
+	        (match_operand 1 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0))
 	  (const_int 0)))]
@@ -10086,13 +10086,13 @@ 
 	(match_op_dup 1
 	  [(and:QI
 	     (subreg:QI
-	       (zero_extract:SI (match_dup 2)
+	       (zero_extract:HI (match_dup 2)
 				(const_int 8)
 				(const_int 8)) 0)
 	     (match_dup 3))
 	   (const_int 0)]))]
 {
-  operands[2] = gen_lowpart (SImode, operands[2]);
+  operands[2] = gen_lowpart (HImode, operands[2]);
   operands[3] = gen_int_mode (INTVAL (operands[3]) >> 8, QImode);
 })
 
@@ -10417,21 +10417,21 @@ 
   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
    && reload_completed"
   [(parallel
-     [(set (zero_extract:SI (match_dup 0)
+     [(set (zero_extract:HI (match_dup 0)
 			    (const_int 8)
 			    (const_int 8))
-	   (subreg:SI
+	   (subreg:HI
 	     (xor:QI
 	       (subreg:QI
-		 (zero_extract:SI (match_dup 0)
+		 (zero_extract:HI (match_dup 0)
 				  (const_int 8)
 				  (const_int 8)) 0)
 	       (subreg:QI
-		 (zero_extract:SI (match_dup 0)
+		 (zero_extract:HI (match_dup 0)
 				  (const_int 8)
 				  (const_int 8)) 0)) 0))
       (clobber (reg:CC FLAGS_REG))])]
-  "operands[0] = gen_lowpart (SImode, operands[0]);")
+  "operands[0] = gen_lowpart (HImode, operands[0]);")
 
 (define_insn "*anddi_2"
   [(set (reg FLAGS_REG)
@@ -10544,14 +10544,14 @@ 
 
 (define_insn "*andqi_ext<mode>_1"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (and:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0,0")
+	        (match_operand 1 "int248_register_operand" "0,0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "general_operand" "QnBc,m")) 0))
@@ -10571,13 +10571,13 @@ 
 	  (and:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0,0")
+	        (match_operand 1 "int248_register_operand" "0,0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "general_operand" "QnBc,m"))
 	  (const_int 0)))
    (set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
@@ -10598,19 +10598,19 @@ 
 
 (define_insn "*andqi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (and:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "%0")
+	        (match_operand 1 "int248_register_operand" "%0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 2 "register_operand" "Q")
+	        (match_operand 2 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0)) 0))
    (clobber (reg:CC FLAGS_REG))]
@@ -10635,20 +10635,20 @@ 
     && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
     && !(~INTVAL (operands[2]) & ~(255 << 8))"
   [(parallel
-     [(set (zero_extract:SI (match_dup 0)
+     [(set (zero_extract:HI (match_dup 0)
 			    (const_int 8)
 			    (const_int 8))
-	   (subreg:SI
+	   (subreg:HI
 	     (and:QI
 	       (subreg:QI
-		 (zero_extract:SI (match_dup 1)
+		 (zero_extract:HI (match_dup 1)
 				  (const_int 8)
 				  (const_int 8)) 0)
 	       (match_dup 2)) 0))
       (clobber (reg:CC FLAGS_REG))])]
 {
-  operands[0] = gen_lowpart (SImode, operands[0]);
-  operands[1] = gen_lowpart (SImode, operands[1]);
+  operands[0] = gen_lowpart (HImode, operands[0]);
+  operands[1] = gen_lowpart (HImode, operands[1]);
   operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode);
 })
 
@@ -11271,14 +11271,14 @@ 
 
 (define_insn "*<code>qi_ext<mode>_1"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (any_or:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0,0")
+	        (match_operand 1 "int248_register_operand" "0,0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "general_operand" "QnBc,m")) 0))
@@ -11293,19 +11293,19 @@ 
 
 (define_insn "*<code>qi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (any_or:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "%0")
+	        (match_operand 1 "int248_register_operand" "%0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 2 "register_operand" "Q")
+	        (match_operand 2 "int248_register_operand" "Q")
 		(const_int 8)
 		(const_int 8)) 0)) 0))
    (clobber (reg:CC FLAGS_REG))]
@@ -11331,13 +11331,13 @@ 
     && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
     && !(INTVAL (operands[2]) & ~(255 << 8))"
   [(parallel
-     [(set (zero_extract:SI (match_dup 0)
+     [(set (zero_extract:HI (match_dup 0)
 			    (const_int 8)
 			    (const_int 8))
-	   (subreg:SI
+	   (subreg:HI
 	     (any_or:QI
 	       (subreg:QI
-		 (zero_extract:SI (match_dup 1)
+		 (zero_extract:HI (match_dup 1)
 				  (const_int 8)
 				  (const_int 8)) 0)
 	       (match_dup 2)) 0))
@@ -11352,8 +11352,8 @@ 
 	emit_note (NOTE_INSN_DELETED);
       DONE;
     }
-  operands[0] = gen_lowpart (SImode, operands[0]);
-  operands[1] = gen_lowpart (SImode, operands[1]);
+  operands[0] = gen_lowpart (HImode, operands[0]);
+  operands[1] = gen_lowpart (HImode, operands[1]);
   operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode);
 })
 
@@ -11406,13 +11406,13 @@ 
 	  (xor:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0,0")
+	        (match_operand 1 "int248_register_operand" "0,0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "general_operand" "QnBc,m"))
 	  (const_int 0)))
    (set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q,Q")
+	  (match_operand 0 "int248_register_operand" "+Q,Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
@@ -11809,14 +11809,14 @@ 
 
 (define_insn "*negqi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (neg:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0")
+	        (match_operand 1 "int248_register_operand" "0")
 		(const_int 8)
 		(const_int 8)) 0)) 0))
    (clobber (reg:CC FLAGS_REG))]
@@ -13370,14 +13370,14 @@ 
 
 (define_insn "*ashlqi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (ashift:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0")
+	        (match_operand 1 "int248_register_operand" "0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "nonmemory_operand" "cI")) 0))
@@ -14273,14 +14273,14 @@ 
 
 (define_insn "*<insn>qi_ext<mode>_2"
   [(set (zero_extract:SWI248
-	  (match_operand:SWI248 0 "register_operand" "+Q")
+	  (match_operand 0 "int248_register_operand" "+Q")
 	  (const_int 8)
 	  (const_int 8))
 	(subreg:SWI248
 	  (any_shiftrt:QI
 	    (subreg:QI
 	      (zero_extract:SWI248
-	        (match_operand:SWI248 1 "register_operand" "0")
+	        (match_operand 1 "int248_register_operand" "0")
 		(const_int 8)
 		(const_int 8)) 0)
 	    (match_operand:QI 2 "nonmemory_operand" "cI")) 0))
@@ -23135,7 +23135,7 @@ 
 	(match_operator 1 "compare_operator"
 	  [(and:QI
 	     (subreg:QI
-	       (zero_extract:SWI248 (match_operand:SWI248 2 "QIreg_operand")
+	       (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
 				    (const_int 8)
 				    (const_int 8)) 0)
 	     (match_operand 3 "const_int_operand"))