From patchwork Fri Jul 6 10:55:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 169411 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 0BA332C01D3 for ; Fri, 6 Jul 2012 20:56:16 +1000 (EST) Comment: DKIM? See http://www.dkim.org DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=gcc.gnu.org; s=default; x=1342176977; h=Comment: DomainKey-Signature:Received:Received:Received:Received: MIME-Version:Received:Received:Date:Message-ID:Subject:From:To: Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:Sender:Delivered-To; bh=aXdRpb/ sJstmZL1+7oh1auj5rpA=; b=dkR1lfXS+JL5BfZb8xUBubznTS8XlQ9pIlmyaUR rvv5JWKeqlqiXJejFKF4bYYAD+InAXviP/4l8maCwBJFzQidHKMzCgt15TlUKLYa RJqFcDEudVgPenMH83PRsL0p1aHaR7wnBejxpqf+kSmqOMlaY9dRPNgzEmUk0FAi zh0Y= Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:MIME-Version:Received:Received:Date:Message-ID:Subject:From:To:Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=BMowh7+0QZxi//9LNCK01gwNtkDGGB24JSj/pbgdNIJDOZ/WsU0eg9rXPc4rX8 8M8tPLel7vTllfVFp5czasTvQimkEMer/t6I02JrPscdozf3XQQL2xY2jPR/CPQu ZK3lTfK6iPSdyeP5ola+UrZdXiKtpv9+XGG3+lPWJN7QE=; Received: (qmail 27751 invoked by alias); 6 Jul 2012 10:56:12 -0000 Received: (qmail 27740 invoked by uid 22791); 6 Jul 2012 10:56:11 -0000 X-SWARE-Spam-Status: No, hits=-4.1 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, KHOP_RCVD_TRUST, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-pb0-f47.google.com (HELO mail-pb0-f47.google.com) (209.85.160.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 06 Jul 2012 10:55:58 +0000 Received: by pbbrq2 with SMTP id rq2so14513601pbb.20 for ; Fri, 06 Jul 2012 03:55:58 -0700 (PDT) MIME-Version: 1.0 Received: by 10.68.131.10 with SMTP id oi10mr35895676pbb.122.1341572158235; Fri, 06 Jul 2012 03:55:58 -0700 (PDT) Received: by 10.66.11.130 with HTTP; Fri, 6 Jul 2012 03:55:58 -0700 (PDT) Date: Fri, 6 Jul 2012 12:55:58 +0200 Message-ID: Subject: [PATCH, i386]: Convert some more simple LEAs to ADD. From: Uros Bizjak To: gcc-patches@gcc.gnu.org Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello! Sometimes, gcc generates: leaq (%rbx,%rax), %rax that is in fact equivalent (modulo flags reg clobber) to: addq %rbx, %rax Attached patch adds additional peephole2 patterns that convert LEA to ADD when second operand of PLUS RTX matches output operand. 2012-07-06 Uros Bizjak * config/i386/i386.md (simple lea to add peephole): Also transform RTXes where second PLUS operand matches output. Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 189310) +++ config/i386/i386.md (working copy) @@ -17301,6 +17301,14 @@ (clobber (reg:CC FLAGS_REG))])]) (define_peephole2 + [(set (match_operand:SWI48 0 "register_operand") + (plus:SWI48 (match_operand:SWI48 1 "") + (match_dup 0)))] + "peep2_regno_dead_p (0, FLAGS_REG)" + [(parallel [(set (match_dup 0) (plus:SWI48 (match_dup 0) (match_dup 1))) + (clobber (reg:CC FLAGS_REG))])]) + +(define_peephole2 [(set (match_operand:SI 0 "register_operand") (subreg:SI (plus:DI (match_operand:DI 1 "register_operand") (match_operand:DI 2 "nonmemory_operand")) 0))] @@ -17312,6 +17320,17 @@ "operands[2] = gen_lowpart (SImode, operands[2]);") (define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (subreg:SI (plus:DI (match_operand:DI 1 "nonmemory_operand") + (match_operand:DI 2 "register_operand")) 0))] + "TARGET_64BIT + && peep2_regno_dead_p (0, FLAGS_REG) + && REGNO (operands[0]) == REGNO (operands[2])" + [(parallel [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1))) + (clobber (reg:CC FLAGS_REG))])] + "operands[1] = gen_lowpart (SImode, operands[1]);") + +(define_peephole2 [(set (match_operand:SWI48 0 "register_operand") (mult:SWI48 (match_dup 0) (match_operand:SWI48 1 "const_int_operand")))]